xref: /OK3568_Linux_fs/u-boot/drivers/power/exynos-tmu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
3*4882a593Smuzhiyun  *      http://www.samsung.com
4*4882a593Smuzhiyun  * Akshay Saraswat <akshay.s@samsung.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * EXYNOS - Thermal Management Unit
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * See file CREDITS for list of people who contributed to this
9*4882a593Smuzhiyun  * project.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
12*4882a593Smuzhiyun  * it under the terms of the GNU General Public License version 2 as
13*4882a593Smuzhiyun  * published by the Free Software Foundation.
14*4882a593Smuzhiyun  * You should have received a copy of the GNU General Public License
15*4882a593Smuzhiyun  * along with this program; if not, write to the Free Software
16*4882a593Smuzhiyun  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17*4882a593Smuzhiyun  * MA 02111-1307 USA
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <common.h>
21*4882a593Smuzhiyun #include <errno.h>
22*4882a593Smuzhiyun #include <fdtdec.h>
23*4882a593Smuzhiyun #include <tmu.h>
24*4882a593Smuzhiyun #include <asm/arch/tmu.h>
25*4882a593Smuzhiyun #include <asm/arch/power.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define TRIMINFO_RELOAD		1
28*4882a593Smuzhiyun #define CORE_EN			1
29*4882a593Smuzhiyun #define THERM_TRIP_EN		(1 << 12)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define INTEN_RISE0		1
32*4882a593Smuzhiyun #define INTEN_RISE1		(1 << 4)
33*4882a593Smuzhiyun #define INTEN_RISE2		(1 << 8)
34*4882a593Smuzhiyun #define INTEN_FALL0		(1 << 16)
35*4882a593Smuzhiyun #define INTEN_FALL1		(1 << 20)
36*4882a593Smuzhiyun #define INTEN_FALL2		(1 << 24)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define TRIM_INFO_MASK		0xff
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define INTCLEAR_RISE0		1
41*4882a593Smuzhiyun #define INTCLEAR_RISE1		(1 << 4)
42*4882a593Smuzhiyun #define INTCLEAR_RISE2		(1 << 8)
43*4882a593Smuzhiyun #define INTCLEAR_FALL0		(1 << 16)
44*4882a593Smuzhiyun #define INTCLEAR_FALL1		(1 << 20)
45*4882a593Smuzhiyun #define INTCLEAR_FALL2		(1 << 24)
46*4882a593Smuzhiyun #define INTCLEARALL		(INTCLEAR_RISE0 | INTCLEAR_RISE1 | \
47*4882a593Smuzhiyun 				 INTCLEAR_RISE2 | INTCLEAR_FALL0 | \
48*4882a593Smuzhiyun 				 INTCLEAR_FALL1 | INTCLEAR_FALL2)
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* Tmeperature threshold values for various thermal events */
51*4882a593Smuzhiyun struct temperature_params {
52*4882a593Smuzhiyun 	/* minimum value in temperature code range */
53*4882a593Smuzhiyun 	unsigned min_val;
54*4882a593Smuzhiyun 	/* maximum value in temperature code range */
55*4882a593Smuzhiyun 	unsigned max_val;
56*4882a593Smuzhiyun 	/* temperature threshold to start warning */
57*4882a593Smuzhiyun 	unsigned start_warning;
58*4882a593Smuzhiyun 	/* temperature threshold CPU tripping */
59*4882a593Smuzhiyun 	unsigned start_tripping;
60*4882a593Smuzhiyun 	/* temperature threshold for HW tripping */
61*4882a593Smuzhiyun 	unsigned hardware_tripping;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* Pre-defined values and thresholds for calibration of current temperature */
65*4882a593Smuzhiyun struct tmu_data {
66*4882a593Smuzhiyun 	/* pre-defined temperature thresholds */
67*4882a593Smuzhiyun 	struct temperature_params ts;
68*4882a593Smuzhiyun 	/* pre-defined efuse range minimum value */
69*4882a593Smuzhiyun 	unsigned efuse_min_value;
70*4882a593Smuzhiyun 	/* pre-defined efuse value for temperature calibration */
71*4882a593Smuzhiyun 	unsigned efuse_value;
72*4882a593Smuzhiyun 	/* pre-defined efuse range maximum value */
73*4882a593Smuzhiyun 	unsigned efuse_max_value;
74*4882a593Smuzhiyun 	/* current temperature sensing slope */
75*4882a593Smuzhiyun 	unsigned slope;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* TMU device specific details and status */
79*4882a593Smuzhiyun struct tmu_info {
80*4882a593Smuzhiyun 	/* base Address for the TMU */
81*4882a593Smuzhiyun 	struct exynos5_tmu_reg *tmu_base;
82*4882a593Smuzhiyun 	/* mux Address for the TMU */
83*4882a593Smuzhiyun 	int tmu_mux;
84*4882a593Smuzhiyun 	/* pre-defined values for calibration and thresholds */
85*4882a593Smuzhiyun 	struct tmu_data data;
86*4882a593Smuzhiyun 	/* value required for triminfo_25 calibration */
87*4882a593Smuzhiyun 	unsigned te1;
88*4882a593Smuzhiyun 	/* value required for triminfo_85 calibration */
89*4882a593Smuzhiyun 	unsigned te2;
90*4882a593Smuzhiyun 	/* Value for measured data calibration */
91*4882a593Smuzhiyun 	int dc_value;
92*4882a593Smuzhiyun 	/* enum value indicating status of the TMU */
93*4882a593Smuzhiyun 	int tmu_state;
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /* Global struct tmu_info variable to store init values */
97*4882a593Smuzhiyun static struct tmu_info gbl_info;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun  * Get current temperature code from register,
101*4882a593Smuzhiyun  * then calculate and calibrate it's value
102*4882a593Smuzhiyun  * in degree celsius.
103*4882a593Smuzhiyun  *
104*4882a593Smuzhiyun  * @return	current temperature of the chip as sensed by TMU
105*4882a593Smuzhiyun  */
get_cur_temp(struct tmu_info * info)106*4882a593Smuzhiyun static int get_cur_temp(struct tmu_info *info)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun 	struct exynos5_tmu_reg *reg = info->tmu_base;
109*4882a593Smuzhiyun 	ulong start;
110*4882a593Smuzhiyun 	int cur_temp = 0;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	/*
113*4882a593Smuzhiyun 	 * Temperature code range between min 25 and max 125.
114*4882a593Smuzhiyun 	 * May run more than once for first call as initial sensing
115*4882a593Smuzhiyun 	 * has not yet happened.
116*4882a593Smuzhiyun 	 */
117*4882a593Smuzhiyun 	if (info->tmu_state == TMU_STATUS_NORMAL) {
118*4882a593Smuzhiyun 		start = get_timer(0);
119*4882a593Smuzhiyun 		do {
120*4882a593Smuzhiyun 			cur_temp = readl(&reg->current_temp) & 0xff;
121*4882a593Smuzhiyun 		} while ((cur_temp == 0) || (get_timer(start) > 100));
122*4882a593Smuzhiyun 	}
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (cur_temp == 0)
125*4882a593Smuzhiyun 		return cur_temp;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/* Calibrate current temperature */
128*4882a593Smuzhiyun 	cur_temp = cur_temp - info->te1 + info->dc_value;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return cur_temp;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun /*
134*4882a593Smuzhiyun  * Monitors status of the TMU device and exynos temperature
135*4882a593Smuzhiyun  *
136*4882a593Smuzhiyun  * @param temp	pointer to the current temperature value
137*4882a593Smuzhiyun  * @return	enum tmu_status_t value, code indicating event to execute
138*4882a593Smuzhiyun  */
tmu_monitor(int * temp)139*4882a593Smuzhiyun enum tmu_status_t tmu_monitor(int *temp)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	int cur_temp;
142*4882a593Smuzhiyun 	struct tmu_data *data = &gbl_info.data;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	if (gbl_info.tmu_state == TMU_STATUS_INIT)
145*4882a593Smuzhiyun 		return TMU_STATUS_INIT;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	/* Read current temperature of the SOC */
148*4882a593Smuzhiyun 	cur_temp = get_cur_temp(&gbl_info);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	if (!cur_temp)
151*4882a593Smuzhiyun 		goto out;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	*temp = cur_temp;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	/* Temperature code lies between min 25 and max 125 */
156*4882a593Smuzhiyun 	if ((cur_temp >= data->ts.start_tripping) &&
157*4882a593Smuzhiyun 	    (cur_temp <= data->ts.max_val))
158*4882a593Smuzhiyun 		return TMU_STATUS_TRIPPED;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	if (cur_temp >= data->ts.start_warning)
161*4882a593Smuzhiyun 		return TMU_STATUS_WARNING;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if ((cur_temp < data->ts.start_warning) &&
164*4882a593Smuzhiyun 	    (cur_temp >= data->ts.min_val))
165*4882a593Smuzhiyun 		return TMU_STATUS_NORMAL;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun  out:
168*4882a593Smuzhiyun 	/* Temperature code does not lie between min 25 and max 125 */
169*4882a593Smuzhiyun 	gbl_info.tmu_state = TMU_STATUS_INIT;
170*4882a593Smuzhiyun 	debug("EXYNOS_TMU: Thermal reading failed\n");
171*4882a593Smuzhiyun 	return TMU_STATUS_INIT;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /*
175*4882a593Smuzhiyun  * Get TMU specific pre-defined values from FDT
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * @param info	pointer to the tmu_info struct
178*4882a593Smuzhiyun  * @param blob  FDT blob
179*4882a593Smuzhiyun  * @return	int value, 0 for success
180*4882a593Smuzhiyun  */
get_tmu_fdt_values(struct tmu_info * info,const void * blob)181*4882a593Smuzhiyun static int get_tmu_fdt_values(struct tmu_info *info, const void *blob)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(OF_CONTROL)
184*4882a593Smuzhiyun 	fdt_addr_t addr;
185*4882a593Smuzhiyun 	int node;
186*4882a593Smuzhiyun 	int error = 0;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/* Get the node from FDT for TMU */
189*4882a593Smuzhiyun 	node = fdtdec_next_compatible(blob, 0,
190*4882a593Smuzhiyun 				      COMPAT_SAMSUNG_EXYNOS_TMU);
191*4882a593Smuzhiyun 	if (node < 0) {
192*4882a593Smuzhiyun 		debug("EXYNOS_TMU: No node for tmu in device tree\n");
193*4882a593Smuzhiyun 		return -ENODEV;
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	/*
197*4882a593Smuzhiyun 	 * Get the pre-defined TMU specific values from FDT.
198*4882a593Smuzhiyun 	 * All of these are expected to be correct otherwise
199*4882a593Smuzhiyun 	 * miscalculation of register values in tmu_setup_parameters
200*4882a593Smuzhiyun 	 * may result in misleading current temperature.
201*4882a593Smuzhiyun 	 */
202*4882a593Smuzhiyun 	addr = fdtdec_get_addr(blob, node, "reg");
203*4882a593Smuzhiyun 	if (addr == FDT_ADDR_T_NONE) {
204*4882a593Smuzhiyun 		debug("%s: Missing tmu-base\n", __func__);
205*4882a593Smuzhiyun 		return -ENODEV;
206*4882a593Smuzhiyun 	}
207*4882a593Smuzhiyun 	info->tmu_base = (struct exynos5_tmu_reg *)addr;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	/* Optional field. */
210*4882a593Smuzhiyun 	info->tmu_mux = fdtdec_get_int(blob,
211*4882a593Smuzhiyun 				node, "samsung,mux", -1);
212*4882a593Smuzhiyun 	/* Take default value as per the user manual b(110) */
213*4882a593Smuzhiyun 	if (info->tmu_mux == -1)
214*4882a593Smuzhiyun 		info->tmu_mux = 0x6;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	info->data.ts.min_val = fdtdec_get_int(blob,
217*4882a593Smuzhiyun 				node, "samsung,min-temp", -1);
218*4882a593Smuzhiyun 	error |= (info->data.ts.min_val == -1);
219*4882a593Smuzhiyun 	info->data.ts.max_val = fdtdec_get_int(blob,
220*4882a593Smuzhiyun 				node, "samsung,max-temp", -1);
221*4882a593Smuzhiyun 	error |= (info->data.ts.max_val == -1);
222*4882a593Smuzhiyun 	info->data.ts.start_warning = fdtdec_get_int(blob,
223*4882a593Smuzhiyun 				node, "samsung,start-warning", -1);
224*4882a593Smuzhiyun 	error |= (info->data.ts.start_warning == -1);
225*4882a593Smuzhiyun 	info->data.ts.start_tripping = fdtdec_get_int(blob,
226*4882a593Smuzhiyun 				node, "samsung,start-tripping", -1);
227*4882a593Smuzhiyun 	error |= (info->data.ts.start_tripping == -1);
228*4882a593Smuzhiyun 	info->data.ts.hardware_tripping = fdtdec_get_int(blob,
229*4882a593Smuzhiyun 				node, "samsung,hw-tripping", -1);
230*4882a593Smuzhiyun 	error |= (info->data.ts.hardware_tripping == -1);
231*4882a593Smuzhiyun 	info->data.efuse_min_value = fdtdec_get_int(blob,
232*4882a593Smuzhiyun 				node, "samsung,efuse-min-value", -1);
233*4882a593Smuzhiyun 	error |= (info->data.efuse_min_value == -1);
234*4882a593Smuzhiyun 	info->data.efuse_value = fdtdec_get_int(blob,
235*4882a593Smuzhiyun 				node, "samsung,efuse-value", -1);
236*4882a593Smuzhiyun 	error |= (info->data.efuse_value == -1);
237*4882a593Smuzhiyun 	info->data.efuse_max_value = fdtdec_get_int(blob,
238*4882a593Smuzhiyun 				node, "samsung,efuse-max-value", -1);
239*4882a593Smuzhiyun 	error |= (info->data.efuse_max_value == -1);
240*4882a593Smuzhiyun 	info->data.slope = fdtdec_get_int(blob,
241*4882a593Smuzhiyun 				node, "samsung,slope", -1);
242*4882a593Smuzhiyun 	error |= (info->data.slope == -1);
243*4882a593Smuzhiyun 	info->dc_value = fdtdec_get_int(blob,
244*4882a593Smuzhiyun 				node, "samsung,dc-value", -1);
245*4882a593Smuzhiyun 	error |= (info->dc_value == -1);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (error) {
248*4882a593Smuzhiyun 		debug("fail to get tmu node properties\n");
249*4882a593Smuzhiyun 		return -EINVAL;
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun #else
252*4882a593Smuzhiyun 	/* Non DT support may never be added. Just in case  */
253*4882a593Smuzhiyun 	return -ENODEV;
254*4882a593Smuzhiyun #endif
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	return 0;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun /*
260*4882a593Smuzhiyun  * Calibrate and calculate threshold values and
261*4882a593Smuzhiyun  * enable interrupt levels
262*4882a593Smuzhiyun  *
263*4882a593Smuzhiyun  * @param	info pointer to the tmu_info struct
264*4882a593Smuzhiyun  */
tmu_setup_parameters(struct tmu_info * info)265*4882a593Smuzhiyun static void tmu_setup_parameters(struct tmu_info *info)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	unsigned te_code, con;
268*4882a593Smuzhiyun 	unsigned warning_code, trip_code, hwtrip_code;
269*4882a593Smuzhiyun 	unsigned cooling_temp;
270*4882a593Smuzhiyun 	unsigned rising_value;
271*4882a593Smuzhiyun 	struct tmu_data *data = &info->data;
272*4882a593Smuzhiyun 	struct exynos5_tmu_reg *reg = info->tmu_base;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	/* Must reload for reading efuse value from triminfo register */
275*4882a593Smuzhiyun 	writel(TRIMINFO_RELOAD, &reg->triminfo_control);
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	/* Get the compensation parameter */
278*4882a593Smuzhiyun 	te_code = readl(&reg->triminfo);
279*4882a593Smuzhiyun 	info->te1 = te_code & TRIM_INFO_MASK;
280*4882a593Smuzhiyun 	info->te2 = ((te_code >> 8) & TRIM_INFO_MASK);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	if ((data->efuse_min_value > info->te1) ||
283*4882a593Smuzhiyun 			(info->te1 > data->efuse_max_value)
284*4882a593Smuzhiyun 			||  (info->te2 != 0))
285*4882a593Smuzhiyun 		info->te1 = data->efuse_value;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	/* Get RISING & FALLING Threshold value */
288*4882a593Smuzhiyun 	warning_code = data->ts.start_warning
289*4882a593Smuzhiyun 			+ info->te1 - info->dc_value;
290*4882a593Smuzhiyun 	trip_code = data->ts.start_tripping
291*4882a593Smuzhiyun 			+ info->te1 - info->dc_value;
292*4882a593Smuzhiyun 	hwtrip_code = data->ts.hardware_tripping
293*4882a593Smuzhiyun 			+ info->te1 - info->dc_value;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	cooling_temp = 0;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	rising_value = ((warning_code << 8) |
298*4882a593Smuzhiyun 			(trip_code << 16) |
299*4882a593Smuzhiyun 			(hwtrip_code << 24));
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	/* Set interrupt level */
302*4882a593Smuzhiyun 	writel(rising_value, &reg->threshold_temp_rise);
303*4882a593Smuzhiyun 	writel(cooling_temp, &reg->threshold_temp_fall);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	/*
306*4882a593Smuzhiyun 	 * Init TMU control tuning parameters
307*4882a593Smuzhiyun 	 * [28:24] VREF - Voltage reference
308*4882a593Smuzhiyun 	 * [15:13] THERM_TRIP_MODE - Tripping mode
309*4882a593Smuzhiyun 	 * [12] THERM_TRIP_EN - Thermal tripping enable
310*4882a593Smuzhiyun 	 * [11:8] BUF_SLOPE_SEL - Gain of amplifier
311*4882a593Smuzhiyun 	 * [6] THERM_TRIP_BY_TQ_EN - Tripping by TQ pin
312*4882a593Smuzhiyun 	 */
313*4882a593Smuzhiyun 	writel(data->slope, &reg->tmu_control);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	writel(INTCLEARALL, &reg->intclear);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	/* TMU core enable */
318*4882a593Smuzhiyun 	con = readl(&reg->tmu_control);
319*4882a593Smuzhiyun 	con |= THERM_TRIP_EN | CORE_EN | (info->tmu_mux << 20);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	writel(con, &reg->tmu_control);
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* Enable HW thermal trip */
324*4882a593Smuzhiyun 	set_hw_thermal_trip();
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	/* LEV1 LEV2 interrupt enable */
327*4882a593Smuzhiyun 	writel(INTEN_RISE1 | INTEN_RISE2, &reg->inten);
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun /*
331*4882a593Smuzhiyun  * Initialize TMU device
332*4882a593Smuzhiyun  *
333*4882a593Smuzhiyun  * @param blob  FDT blob
334*4882a593Smuzhiyun  * @return	int value, 0 for success
335*4882a593Smuzhiyun  */
tmu_init(const void * blob)336*4882a593Smuzhiyun int tmu_init(const void *blob)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	gbl_info.tmu_state = TMU_STATUS_INIT;
339*4882a593Smuzhiyun 	if (get_tmu_fdt_values(&gbl_info, blob) < 0)
340*4882a593Smuzhiyun 		goto ret;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	tmu_setup_parameters(&gbl_info);
343*4882a593Smuzhiyun 	gbl_info.tmu_state = TMU_STATUS_NORMAL;
344*4882a593Smuzhiyun ret:
345*4882a593Smuzhiyun 	return gbl_info.tmu_state;
346*4882a593Smuzhiyun }
347