xref: /OK3568_Linux_fs/u-boot/drivers/power/domain/tegra186-power-domain.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2016, NVIDIA CORPORATION.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier: GPL-2.0
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <misc.h>
10*4882a593Smuzhiyun #include <power-domain-uclass.h>
11*4882a593Smuzhiyun #include <asm/arch-tegra/bpmp_abi.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define UPDATE	BIT(0)
14*4882a593Smuzhiyun #define ON	BIT(1)
15*4882a593Smuzhiyun 
tegra186_power_domain_request(struct power_domain * power_domain)16*4882a593Smuzhiyun static int tegra186_power_domain_request(struct power_domain *power_domain)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun 	debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
19*4882a593Smuzhiyun 	      power_domain, power_domain->dev, power_domain->id);
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun 	return 0;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun 
tegra186_power_domain_free(struct power_domain * power_domain)24*4882a593Smuzhiyun static int tegra186_power_domain_free(struct power_domain *power_domain)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
27*4882a593Smuzhiyun 	      power_domain, power_domain->dev, power_domain->id);
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	return 0;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun 
tegra186_power_domain_common(struct power_domain * power_domain,bool on)32*4882a593Smuzhiyun static int tegra186_power_domain_common(struct power_domain *power_domain,
33*4882a593Smuzhiyun 					bool on)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct mrq_pg_update_state_request req;
36*4882a593Smuzhiyun 	int on_state = on ? ON : 0;
37*4882a593Smuzhiyun 	int ret;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	req.partition_id = power_domain->id;
40*4882a593Smuzhiyun 	req.logic_state = UPDATE | on_state;
41*4882a593Smuzhiyun 	req.sram_state = UPDATE | on_state;
42*4882a593Smuzhiyun 	/*
43*4882a593Smuzhiyun 	 * Drivers manage their own clocks so they don't get out of sync, and
44*4882a593Smuzhiyun 	 * since some power domains have many clocks, only a subset of which
45*4882a593Smuzhiyun 	 * are actually needed depending on use-case.
46*4882a593Smuzhiyun 	 */
47*4882a593Smuzhiyun 	req.clock_state = UPDATE;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	ret = misc_call(power_domain->dev->parent, MRQ_PG_UPDATE_STATE, &req,
50*4882a593Smuzhiyun 			sizeof(req), NULL, 0);
51*4882a593Smuzhiyun 	if (ret < 0)
52*4882a593Smuzhiyun 		return ret;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
tegra186_power_domain_on(struct power_domain * power_domain)57*4882a593Smuzhiyun static int tegra186_power_domain_on(struct power_domain *power_domain)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
60*4882a593Smuzhiyun 	      power_domain, power_domain->dev, power_domain->id);
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	return tegra186_power_domain_common(power_domain, true);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
tegra186_power_domain_off(struct power_domain * power_domain)65*4882a593Smuzhiyun static int tegra186_power_domain_off(struct power_domain *power_domain)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
68*4882a593Smuzhiyun 	      power_domain, power_domain->dev, power_domain->id);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	return tegra186_power_domain_common(power_domain, false);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun struct power_domain_ops tegra186_power_domain_ops = {
74*4882a593Smuzhiyun 	.request = tegra186_power_domain_request,
75*4882a593Smuzhiyun 	.free = tegra186_power_domain_free,
76*4882a593Smuzhiyun 	.on = tegra186_power_domain_on,
77*4882a593Smuzhiyun 	.off = tegra186_power_domain_off,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
tegra186_power_domain_probe(struct udevice * dev)80*4882a593Smuzhiyun static int tegra186_power_domain_probe(struct udevice *dev)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	debug("%s(dev=%p)\n", __func__, dev);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun U_BOOT_DRIVER(tegra186_power_domain) = {
88*4882a593Smuzhiyun 	.name = "tegra186_power_domain",
89*4882a593Smuzhiyun 	.id = UCLASS_POWER_DOMAIN,
90*4882a593Smuzhiyun 	.probe = tegra186_power_domain_probe,
91*4882a593Smuzhiyun 	.ops = &tegra186_power_domain_ops,
92*4882a593Smuzhiyun };
93