1*4882a593Smuzhiyunif ARCH_ROCKCHIP 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig PINCTRL_ROCKCHIP 4*4882a593Smuzhiyun bool "Rockchip pin control drivers" 5*4882a593Smuzhiyun depends on ARCH_ROCKCHIP && PINCTRL_GENERIC 6*4882a593Smuzhiyun default y 7*4882a593Smuzhiyun help 8*4882a593Smuzhiyun Enable support pin control functions for Rockchip SoCs. 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunconfig SPL_PINCTRL_ROCKCHIP 11*4882a593Smuzhiyun bool "Support Rockchip pin controllers in SPL" 12*4882a593Smuzhiyun depends on ARCH_ROCKCHIP && SPL_PINCTRL_GENERIC 13*4882a593Smuzhiyun default y 14*4882a593Smuzhiyun help 15*4882a593Smuzhiyun This option is an SPL-variant of the PINCTRL_ROCKCHIP option. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyunendif 18