1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __DRIVERS_PINCTRL_IMX_H 8*4882a593Smuzhiyun #define __DRIVERS_PINCTRL_IMX_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /** 11*4882a593Smuzhiyun * @base: the address to the controller in virtual memory 12*4882a593Smuzhiyun * @input_sel_base: the address of the select input in virtual memory. 13*4882a593Smuzhiyun * @flags: flags specific for each soc 14*4882a593Smuzhiyun * @mux_mask: Used when SHARE_MUX_CONF_REG flag is added 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun struct imx_pinctrl_soc_info { 17*4882a593Smuzhiyun void __iomem *base; 18*4882a593Smuzhiyun void __iomem *input_sel_base; 19*4882a593Smuzhiyun unsigned int flags; 20*4882a593Smuzhiyun unsigned int mux_mask; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /** 24*4882a593Smuzhiyun * @dev: a pointer back to containing device 25*4882a593Smuzhiyun * @info: the soc info 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun struct imx_pinctrl_priv { 28*4882a593Smuzhiyun struct udevice *dev; 29*4882a593Smuzhiyun struct imx_pinctrl_soc_info *info; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun extern const struct pinctrl_ops imx_pinctrl_ops; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */ 35*4882a593Smuzhiyun #define IMX_PAD_SION 0x40000000 /* set SION */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and 39*4882a593Smuzhiyun * 1 u32 CONFIG, so 24 types in total for each pin. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun #define FSL_PIN_SIZE 24 42*4882a593Smuzhiyun #define SHARE_FSL_PIN_SIZE 20 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define SHARE_MUX_CONF_REG 0x1 45*4882a593Smuzhiyun #define ZERO_OFFSET_VALID 0x2 46*4882a593Smuzhiyun #define CONFIG_IBE_OBE 0x4 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define IOMUXC_CONFIG_SION (0x1 << 4) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun int imx_pinctrl_probe(struct udevice *dev, struct imx_pinctrl_soc_info *info); 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun int imx_pinctrl_remove(struct udevice *dev); 53*4882a593Smuzhiyun #endif /* __DRIVERS_PINCTRL_IMX_H */ 54