1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Based on code from Linux kernel: 5*4882a593Smuzhiyun * Copyright (C) 2016 Endless Mobile, Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <common.h> 11*4882a593Smuzhiyun #include <dm.h> 12*4882a593Smuzhiyun #include <dm/pinctrl.h> 13*4882a593Smuzhiyun #include <dt-bindings/gpio/meson-gxbb-gpio.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include "pinctrl-meson.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define EE_OFF 14 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun static const unsigned int emmc_nand_d07_pins[] = { 20*4882a593Smuzhiyun PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF), 21*4882a593Smuzhiyun PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF), 22*4882a593Smuzhiyun PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF), 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; 25*4882a593Smuzhiyun static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; 26*4882a593Smuzhiyun static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) }; 29*4882a593Smuzhiyun static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) }; 30*4882a593Smuzhiyun static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) }; 31*4882a593Smuzhiyun static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) }; 32*4882a593Smuzhiyun static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) }; 33*4882a593Smuzhiyun static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) }; 36*4882a593Smuzhiyun static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) }; 37*4882a593Smuzhiyun static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) }; 38*4882a593Smuzhiyun static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) }; 41*4882a593Smuzhiyun static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) }; 42*4882a593Smuzhiyun static const unsigned int uart_cts_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; 43*4882a593Smuzhiyun static const unsigned int uart_rts_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_13, EE_OFF) }; 46*4882a593Smuzhiyun static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) }; 47*4882a593Smuzhiyun static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_11, EE_OFF) }; 48*4882a593Smuzhiyun static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_12, EE_OFF) }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; 51*4882a593Smuzhiyun static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; 52*4882a593Smuzhiyun static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; 53*4882a593Smuzhiyun static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) }; 54*4882a593Smuzhiyun static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; 55*4882a593Smuzhiyun static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; 56*4882a593Smuzhiyun static const unsigned int eth_rxd2_pins[] = { PIN(GPIOZ_6, EE_OFF) }; 57*4882a593Smuzhiyun static const unsigned int eth_rxd3_pins[] = { PIN(GPIOZ_7, EE_OFF) }; 58*4882a593Smuzhiyun static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) }; 59*4882a593Smuzhiyun static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_9, EE_OFF) }; 60*4882a593Smuzhiyun static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) }; 61*4882a593Smuzhiyun static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; 62*4882a593Smuzhiyun static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) }; 63*4882a593Smuzhiyun static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) }; 66*4882a593Smuzhiyun static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) }; 67*4882a593Smuzhiyun static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) }; 68*4882a593Smuzhiyun static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) }; 69*4882a593Smuzhiyun static const unsigned int uart_tx_ao_b_pins[] = { PIN(GPIOAO_0, 0) }; 70*4882a593Smuzhiyun static const unsigned int uart_rx_ao_b_pins[] = { PIN(GPIOAO_1, 0), 71*4882a593Smuzhiyun PIN(GPIOAO_5, 0) }; 72*4882a593Smuzhiyun static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) }; 73*4882a593Smuzhiyun static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun static const unsigned int i2c_sck_ao_pins[] = {PIN(GPIOAO_4, 0) }; 76*4882a593Smuzhiyun static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) }; 77*4882a593Smuzhiyun static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) }; 78*4882a593Smuzhiyun static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun static struct meson_pmx_group meson_gxbb_periphs_groups[] = { 81*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_0, EE_OFF), 82*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_1, EE_OFF), 83*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_2, EE_OFF), 84*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_3, EE_OFF), 85*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_4, EE_OFF), 86*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_5, EE_OFF), 87*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_6, EE_OFF), 88*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_7, EE_OFF), 89*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_8, EE_OFF), 90*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_9, EE_OFF), 91*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_10, EE_OFF), 92*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_11, EE_OFF), 93*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_12, EE_OFF), 94*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_13, EE_OFF), 95*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_14, EE_OFF), 96*4882a593Smuzhiyun GPIO_GROUP(GPIOZ_15, EE_OFF), 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun GPIO_GROUP(GPIOH_0, EE_OFF), 99*4882a593Smuzhiyun GPIO_GROUP(GPIOH_1, EE_OFF), 100*4882a593Smuzhiyun GPIO_GROUP(GPIOH_2, EE_OFF), 101*4882a593Smuzhiyun GPIO_GROUP(GPIOH_3, EE_OFF), 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun GPIO_GROUP(BOOT_0, EE_OFF), 104*4882a593Smuzhiyun GPIO_GROUP(BOOT_1, EE_OFF), 105*4882a593Smuzhiyun GPIO_GROUP(BOOT_2, EE_OFF), 106*4882a593Smuzhiyun GPIO_GROUP(BOOT_3, EE_OFF), 107*4882a593Smuzhiyun GPIO_GROUP(BOOT_4, EE_OFF), 108*4882a593Smuzhiyun GPIO_GROUP(BOOT_5, EE_OFF), 109*4882a593Smuzhiyun GPIO_GROUP(BOOT_6, EE_OFF), 110*4882a593Smuzhiyun GPIO_GROUP(BOOT_7, EE_OFF), 111*4882a593Smuzhiyun GPIO_GROUP(BOOT_8, EE_OFF), 112*4882a593Smuzhiyun GPIO_GROUP(BOOT_9, EE_OFF), 113*4882a593Smuzhiyun GPIO_GROUP(BOOT_10, EE_OFF), 114*4882a593Smuzhiyun GPIO_GROUP(BOOT_11, EE_OFF), 115*4882a593Smuzhiyun GPIO_GROUP(BOOT_12, EE_OFF), 116*4882a593Smuzhiyun GPIO_GROUP(BOOT_13, EE_OFF), 117*4882a593Smuzhiyun GPIO_GROUP(BOOT_14, EE_OFF), 118*4882a593Smuzhiyun GPIO_GROUP(BOOT_15, EE_OFF), 119*4882a593Smuzhiyun GPIO_GROUP(BOOT_16, EE_OFF), 120*4882a593Smuzhiyun GPIO_GROUP(BOOT_17, EE_OFF), 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun GPIO_GROUP(CARD_0, EE_OFF), 123*4882a593Smuzhiyun GPIO_GROUP(CARD_1, EE_OFF), 124*4882a593Smuzhiyun GPIO_GROUP(CARD_2, EE_OFF), 125*4882a593Smuzhiyun GPIO_GROUP(CARD_3, EE_OFF), 126*4882a593Smuzhiyun GPIO_GROUP(CARD_4, EE_OFF), 127*4882a593Smuzhiyun GPIO_GROUP(CARD_5, EE_OFF), 128*4882a593Smuzhiyun GPIO_GROUP(CARD_6, EE_OFF), 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun GPIO_GROUP(GPIODV_0, EE_OFF), 131*4882a593Smuzhiyun GPIO_GROUP(GPIODV_1, EE_OFF), 132*4882a593Smuzhiyun GPIO_GROUP(GPIODV_2, EE_OFF), 133*4882a593Smuzhiyun GPIO_GROUP(GPIODV_3, EE_OFF), 134*4882a593Smuzhiyun GPIO_GROUP(GPIODV_4, EE_OFF), 135*4882a593Smuzhiyun GPIO_GROUP(GPIODV_5, EE_OFF), 136*4882a593Smuzhiyun GPIO_GROUP(GPIODV_6, EE_OFF), 137*4882a593Smuzhiyun GPIO_GROUP(GPIODV_7, EE_OFF), 138*4882a593Smuzhiyun GPIO_GROUP(GPIODV_8, EE_OFF), 139*4882a593Smuzhiyun GPIO_GROUP(GPIODV_9, EE_OFF), 140*4882a593Smuzhiyun GPIO_GROUP(GPIODV_10, EE_OFF), 141*4882a593Smuzhiyun GPIO_GROUP(GPIODV_11, EE_OFF), 142*4882a593Smuzhiyun GPIO_GROUP(GPIODV_12, EE_OFF), 143*4882a593Smuzhiyun GPIO_GROUP(GPIODV_13, EE_OFF), 144*4882a593Smuzhiyun GPIO_GROUP(GPIODV_14, EE_OFF), 145*4882a593Smuzhiyun GPIO_GROUP(GPIODV_15, EE_OFF), 146*4882a593Smuzhiyun GPIO_GROUP(GPIODV_16, EE_OFF), 147*4882a593Smuzhiyun GPIO_GROUP(GPIODV_17, EE_OFF), 148*4882a593Smuzhiyun GPIO_GROUP(GPIODV_19, EE_OFF), 149*4882a593Smuzhiyun GPIO_GROUP(GPIODV_20, EE_OFF), 150*4882a593Smuzhiyun GPIO_GROUP(GPIODV_21, EE_OFF), 151*4882a593Smuzhiyun GPIO_GROUP(GPIODV_22, EE_OFF), 152*4882a593Smuzhiyun GPIO_GROUP(GPIODV_23, EE_OFF), 153*4882a593Smuzhiyun GPIO_GROUP(GPIODV_24, EE_OFF), 154*4882a593Smuzhiyun GPIO_GROUP(GPIODV_25, EE_OFF), 155*4882a593Smuzhiyun GPIO_GROUP(GPIODV_26, EE_OFF), 156*4882a593Smuzhiyun GPIO_GROUP(GPIODV_27, EE_OFF), 157*4882a593Smuzhiyun GPIO_GROUP(GPIODV_28, EE_OFF), 158*4882a593Smuzhiyun GPIO_GROUP(GPIODV_29, EE_OFF), 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun GPIO_GROUP(GPIOY_0, EE_OFF), 161*4882a593Smuzhiyun GPIO_GROUP(GPIOY_1, EE_OFF), 162*4882a593Smuzhiyun GPIO_GROUP(GPIOY_2, EE_OFF), 163*4882a593Smuzhiyun GPIO_GROUP(GPIOY_3, EE_OFF), 164*4882a593Smuzhiyun GPIO_GROUP(GPIOY_4, EE_OFF), 165*4882a593Smuzhiyun GPIO_GROUP(GPIOY_5, EE_OFF), 166*4882a593Smuzhiyun GPIO_GROUP(GPIOY_6, EE_OFF), 167*4882a593Smuzhiyun GPIO_GROUP(GPIOY_7, EE_OFF), 168*4882a593Smuzhiyun GPIO_GROUP(GPIOY_8, EE_OFF), 169*4882a593Smuzhiyun GPIO_GROUP(GPIOY_9, EE_OFF), 170*4882a593Smuzhiyun GPIO_GROUP(GPIOY_10, EE_OFF), 171*4882a593Smuzhiyun GPIO_GROUP(GPIOY_11, EE_OFF), 172*4882a593Smuzhiyun GPIO_GROUP(GPIOY_12, EE_OFF), 173*4882a593Smuzhiyun GPIO_GROUP(GPIOY_13, EE_OFF), 174*4882a593Smuzhiyun GPIO_GROUP(GPIOY_14, EE_OFF), 175*4882a593Smuzhiyun GPIO_GROUP(GPIOY_15, EE_OFF), 176*4882a593Smuzhiyun GPIO_GROUP(GPIOY_16, EE_OFF), 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun GPIO_GROUP(GPIOX_0, EE_OFF), 179*4882a593Smuzhiyun GPIO_GROUP(GPIOX_1, EE_OFF), 180*4882a593Smuzhiyun GPIO_GROUP(GPIOX_2, EE_OFF), 181*4882a593Smuzhiyun GPIO_GROUP(GPIOX_3, EE_OFF), 182*4882a593Smuzhiyun GPIO_GROUP(GPIOX_4, EE_OFF), 183*4882a593Smuzhiyun GPIO_GROUP(GPIOX_5, EE_OFF), 184*4882a593Smuzhiyun GPIO_GROUP(GPIOX_6, EE_OFF), 185*4882a593Smuzhiyun GPIO_GROUP(GPIOX_7, EE_OFF), 186*4882a593Smuzhiyun GPIO_GROUP(GPIOX_8, EE_OFF), 187*4882a593Smuzhiyun GPIO_GROUP(GPIOX_9, EE_OFF), 188*4882a593Smuzhiyun GPIO_GROUP(GPIOX_10, EE_OFF), 189*4882a593Smuzhiyun GPIO_GROUP(GPIOX_11, EE_OFF), 190*4882a593Smuzhiyun GPIO_GROUP(GPIOX_12, EE_OFF), 191*4882a593Smuzhiyun GPIO_GROUP(GPIOX_13, EE_OFF), 192*4882a593Smuzhiyun GPIO_GROUP(GPIOX_14, EE_OFF), 193*4882a593Smuzhiyun GPIO_GROUP(GPIOX_15, EE_OFF), 194*4882a593Smuzhiyun GPIO_GROUP(GPIOX_16, EE_OFF), 195*4882a593Smuzhiyun GPIO_GROUP(GPIOX_17, EE_OFF), 196*4882a593Smuzhiyun GPIO_GROUP(GPIOX_18, EE_OFF), 197*4882a593Smuzhiyun GPIO_GROUP(GPIOX_19, EE_OFF), 198*4882a593Smuzhiyun GPIO_GROUP(GPIOX_20, EE_OFF), 199*4882a593Smuzhiyun GPIO_GROUP(GPIOX_21, EE_OFF), 200*4882a593Smuzhiyun GPIO_GROUP(GPIOX_22, EE_OFF), 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun GPIO_GROUP(GPIOCLK_0, EE_OFF), 203*4882a593Smuzhiyun GPIO_GROUP(GPIOCLK_1, EE_OFF), 204*4882a593Smuzhiyun GPIO_GROUP(GPIOCLK_2, EE_OFF), 205*4882a593Smuzhiyun GPIO_GROUP(GPIOCLK_3, EE_OFF), 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun GPIO_GROUP(GPIO_TEST_N, EE_OFF), 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun /* Bank X */ 210*4882a593Smuzhiyun GROUP(uart_tx_a, 4, 13), 211*4882a593Smuzhiyun GROUP(uart_rx_a, 4, 12), 212*4882a593Smuzhiyun GROUP(uart_cts_a, 4, 11), 213*4882a593Smuzhiyun GROUP(uart_rts_a, 4, 10), 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun /* Bank Y */ 216*4882a593Smuzhiyun GROUP(uart_cts_c, 1, 19), 217*4882a593Smuzhiyun GROUP(uart_rts_c, 1, 18), 218*4882a593Smuzhiyun GROUP(uart_tx_c, 1, 17), 219*4882a593Smuzhiyun GROUP(uart_rx_c, 1, 16), 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun /* Bank Z */ 222*4882a593Smuzhiyun GROUP(eth_mdio, 6, 1), 223*4882a593Smuzhiyun GROUP(eth_mdc, 6, 0), 224*4882a593Smuzhiyun GROUP(eth_clk_rx_clk, 6, 13), 225*4882a593Smuzhiyun GROUP(eth_rx_dv, 6, 12), 226*4882a593Smuzhiyun GROUP(eth_rxd0, 6, 11), 227*4882a593Smuzhiyun GROUP(eth_rxd1, 6, 10), 228*4882a593Smuzhiyun GROUP(eth_rxd2, 6, 9), 229*4882a593Smuzhiyun GROUP(eth_rxd3, 6, 8), 230*4882a593Smuzhiyun GROUP(eth_rgmii_tx_clk, 6, 7), 231*4882a593Smuzhiyun GROUP(eth_tx_en, 6, 6), 232*4882a593Smuzhiyun GROUP(eth_txd0, 6, 5), 233*4882a593Smuzhiyun GROUP(eth_txd1, 6, 4), 234*4882a593Smuzhiyun GROUP(eth_txd2, 6, 3), 235*4882a593Smuzhiyun GROUP(eth_txd3, 6, 2), 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun /* Bank DV */ 238*4882a593Smuzhiyun GROUP(uart_tx_b, 2, 29), 239*4882a593Smuzhiyun GROUP(uart_rx_b, 2, 28), 240*4882a593Smuzhiyun GROUP(uart_cts_b, 2, 27), 241*4882a593Smuzhiyun GROUP(uart_rts_b, 2, 26), 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun /* Bank BOOT */ 244*4882a593Smuzhiyun GROUP(emmc_nand_d07, 4, 30), 245*4882a593Smuzhiyun GROUP(emmc_clk, 4, 18), 246*4882a593Smuzhiyun GROUP(emmc_cmd, 4, 19), 247*4882a593Smuzhiyun GROUP(emmc_ds, 4, 31), 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun /* Bank CARD */ 250*4882a593Smuzhiyun GROUP(sdcard_d1, 2, 14), 251*4882a593Smuzhiyun GROUP(sdcard_d0, 2, 15), 252*4882a593Smuzhiyun GROUP(sdcard_d3, 2, 12), 253*4882a593Smuzhiyun GROUP(sdcard_d2, 2, 13), 254*4882a593Smuzhiyun GROUP(sdcard_cmd, 2, 10), 255*4882a593Smuzhiyun GROUP(sdcard_clk, 2, 11), 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun static struct meson_pmx_group meson_gxbb_aobus_groups[] = { 259*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_0, 0), 260*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_1, 0), 261*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_2, 0), 262*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_3, 0), 263*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_4, 0), 264*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_5, 0), 265*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_6, 0), 266*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_7, 0), 267*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_8, 0), 268*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_9, 0), 269*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_10, 0), 270*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_11, 0), 271*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_12, 0), 272*4882a593Smuzhiyun GPIO_GROUP(GPIOAO_13, 0), 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun /* bank AO */ 275*4882a593Smuzhiyun GROUP(uart_tx_ao_b, 0, 26), 276*4882a593Smuzhiyun GROUP(uart_rx_ao_b, 0, 25), 277*4882a593Smuzhiyun GROUP(uart_tx_ao_a, 0, 12), 278*4882a593Smuzhiyun GROUP(uart_rx_ao_a, 0, 11), 279*4882a593Smuzhiyun GROUP(uart_cts_ao_a, 0, 10), 280*4882a593Smuzhiyun GROUP(uart_rts_ao_a, 0, 9), 281*4882a593Smuzhiyun GROUP(uart_cts_ao_b, 0, 8), 282*4882a593Smuzhiyun GROUP(uart_rts_ao_b, 0, 7), 283*4882a593Smuzhiyun GROUP(i2c_sck_ao, 0, 6), 284*4882a593Smuzhiyun GROUP(i2c_sda_ao, 0, 5), 285*4882a593Smuzhiyun GROUP(i2c_slave_sck_ao, 0, 2), 286*4882a593Smuzhiyun GROUP(i2c_slave_sda_ao, 0, 1), 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun static const char * const gpio_periphs_groups[] = { 290*4882a593Smuzhiyun "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", 291*4882a593Smuzhiyun "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", 292*4882a593Smuzhiyun "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", 293*4882a593Smuzhiyun "GPIOZ_15", 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", 298*4882a593Smuzhiyun "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", 299*4882a593Smuzhiyun "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", 300*4882a593Smuzhiyun "BOOT_15", "BOOT_16", "BOOT_17", 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", 303*4882a593Smuzhiyun "CARD_5", "CARD_6", 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", 306*4882a593Smuzhiyun "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", 307*4882a593Smuzhiyun "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", 308*4882a593Smuzhiyun "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", 309*4882a593Smuzhiyun "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24", 310*4882a593Smuzhiyun "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29", 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4", 313*4882a593Smuzhiyun "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9", 314*4882a593Smuzhiyun "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14", 315*4882a593Smuzhiyun "GPIOY_15", "GPIOY_16", 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", 318*4882a593Smuzhiyun "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", 319*4882a593Smuzhiyun "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", 320*4882a593Smuzhiyun "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", 321*4882a593Smuzhiyun "GPIOX_20", "GPIOX_21", "GPIOX_22", 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun "GPIO_TEST_N", 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun static const char * const emmc_groups[] = { 327*4882a593Smuzhiyun "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds", 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun static const char * const sdcard_groups[] = { 331*4882a593Smuzhiyun "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", 332*4882a593Smuzhiyun "sdcard_cmd", "sdcard_clk", 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun static const char * const uart_a_groups[] = { 336*4882a593Smuzhiyun "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun static const char * const uart_b_groups[] = { 340*4882a593Smuzhiyun "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b", 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun static const char * const uart_c_groups[] = { 344*4882a593Smuzhiyun "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c", 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun static const char * const eth_groups[] = { 348*4882a593Smuzhiyun "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", 349*4882a593Smuzhiyun "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", 350*4882a593Smuzhiyun "eth_rgmii_tx_clk", "eth_tx_en", 351*4882a593Smuzhiyun "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3", 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun static const char * const gpio_aobus_groups[] = { 355*4882a593Smuzhiyun "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", 356*4882a593Smuzhiyun "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", 357*4882a593Smuzhiyun "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13", 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun static const char * const uart_ao_groups[] = { 361*4882a593Smuzhiyun "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a", 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun static const char * const uart_ao_b_groups[] = { 365*4882a593Smuzhiyun "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b", 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun static const char * const i2c_ao_groups[] = { 369*4882a593Smuzhiyun "i2c_sdk_ao", "i2c_sda_ao", 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun static const char * const i2c_slave_ao_groups[] = { 373*4882a593Smuzhiyun "i2c_slave_sdk_ao", "i2c_slave_sda_ao", 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun static struct meson_pmx_func meson_gxbb_periphs_functions[] = { 377*4882a593Smuzhiyun FUNCTION(gpio_periphs), 378*4882a593Smuzhiyun FUNCTION(emmc), 379*4882a593Smuzhiyun FUNCTION(sdcard), 380*4882a593Smuzhiyun FUNCTION(uart_a), 381*4882a593Smuzhiyun FUNCTION(uart_b), 382*4882a593Smuzhiyun FUNCTION(uart_c), 383*4882a593Smuzhiyun FUNCTION(eth), 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun static struct meson_pmx_func meson_gxbb_aobus_functions[] = { 387*4882a593Smuzhiyun FUNCTION(gpio_aobus), 388*4882a593Smuzhiyun FUNCTION(uart_ao), 389*4882a593Smuzhiyun FUNCTION(uart_ao_b), 390*4882a593Smuzhiyun FUNCTION(i2c_ao), 391*4882a593Smuzhiyun FUNCTION(i2c_slave_ao), 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun static struct meson_bank meson_gxbb_periphs_banks[] = { 395*4882a593Smuzhiyun /* name first last pullen pull dir out in */ 396*4882a593Smuzhiyun BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), 397*4882a593Smuzhiyun BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_16, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0), 398*4882a593Smuzhiyun BANK("DV", PIN(GPIODV_0, EE_OFF), PIN(GPIODV_29, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), 399*4882a593Smuzhiyun BANK("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_3, EE_OFF), 1, 20, 1, 20, 3, 20, 4, 20, 5, 20), 400*4882a593Smuzhiyun BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), 401*4882a593Smuzhiyun BANK("CARD", PIN(CARD_0, EE_OFF), PIN(CARD_6, EE_OFF), 2, 20, 2, 20, 6, 20, 7, 20, 8, 20), 402*4882a593Smuzhiyun BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_17, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), 403*4882a593Smuzhiyun BANK("CLK", PIN(GPIOCLK_0, EE_OFF), PIN(GPIOCLK_3, EE_OFF), 3, 28, 3, 28, 9, 28, 10, 28, 11, 28), 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun static struct meson_bank meson_gxbb_aobus_banks[] = { 407*4882a593Smuzhiyun /* name first last pullen pull dir out in */ 408*4882a593Smuzhiyun BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { 412*4882a593Smuzhiyun .name = "periphs-banks", 413*4882a593Smuzhiyun .pin_base = 14, 414*4882a593Smuzhiyun .groups = meson_gxbb_periphs_groups, 415*4882a593Smuzhiyun .funcs = meson_gxbb_periphs_functions, 416*4882a593Smuzhiyun .banks = meson_gxbb_periphs_banks, 417*4882a593Smuzhiyun .num_pins = 120, 418*4882a593Smuzhiyun .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups), 419*4882a593Smuzhiyun .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions), 420*4882a593Smuzhiyun .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks), 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { 424*4882a593Smuzhiyun .name = "aobus-banks", 425*4882a593Smuzhiyun .pin_base = 0, 426*4882a593Smuzhiyun .groups = meson_gxbb_aobus_groups, 427*4882a593Smuzhiyun .funcs = meson_gxbb_aobus_functions, 428*4882a593Smuzhiyun .banks = meson_gxbb_aobus_banks, 429*4882a593Smuzhiyun .num_pins = 14, 430*4882a593Smuzhiyun .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups), 431*4882a593Smuzhiyun .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions), 432*4882a593Smuzhiyun .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks), 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun static const struct udevice_id meson_gxbb_pinctrl_match[] = { 436*4882a593Smuzhiyun { 437*4882a593Smuzhiyun .compatible = "amlogic,meson-gxbb-periphs-pinctrl", 438*4882a593Smuzhiyun .data = (ulong)&meson_gxbb_periphs_pinctrl_data, 439*4882a593Smuzhiyun }, 440*4882a593Smuzhiyun { 441*4882a593Smuzhiyun .compatible = "amlogic,meson-gxbb-aobus-pinctrl", 442*4882a593Smuzhiyun .data = (ulong)&meson_gxbb_aobus_pinctrl_data, 443*4882a593Smuzhiyun }, 444*4882a593Smuzhiyun { /* sentinel */ } 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun U_BOOT_DRIVER(meson_gxbb_pinctrl) = { 448*4882a593Smuzhiyun .name = "meson-gxbb-pinctrl", 449*4882a593Smuzhiyun .id = UCLASS_PINCTRL, 450*4882a593Smuzhiyun .of_match = of_match_ptr(meson_gxbb_pinctrl_match), 451*4882a593Smuzhiyun .probe = meson_pinctrl_probe, 452*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct meson_pinctrl), 453*4882a593Smuzhiyun .ops = &meson_pinctrl_ops, 454*4882a593Smuzhiyun }; 455