1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
3*4882a593Smuzhiyun * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <asm/io.h>
10*4882a593Smuzhiyun #include <bitfield.h>
11*4882a593Smuzhiyun #include <dm.h>
12*4882a593Smuzhiyun #include <errno.h>
13*4882a593Smuzhiyun #include <fdtdec.h>
14*4882a593Smuzhiyun #include <generic-phy.h>
15*4882a593Smuzhiyun #include <linux/libfdt.h>
16*4882a593Smuzhiyun #include <regmap.h>
17*4882a593Smuzhiyun #include <reset-uclass.h>
18*4882a593Smuzhiyun #include <syscon.h>
19*4882a593Smuzhiyun #include <wait_bit.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/bitops.h>
22*4882a593Smuzhiyun #include <linux/compat.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Default PHY_SEL and REFCLKSEL configuration */
27*4882a593Smuzhiyun #define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* ports parameters overriding */
30*4882a593Smuzhiyun #define STIH407_USB_PICOPHY_PARAM_DEF 0x39a4dc
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define PHYPARAM_REG 1
33*4882a593Smuzhiyun #define PHYCTRL_REG 2
34*4882a593Smuzhiyun #define PHYPARAM_NB 3
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct sti_usb_phy {
37*4882a593Smuzhiyun struct regmap *regmap;
38*4882a593Smuzhiyun struct reset_ctl global_ctl;
39*4882a593Smuzhiyun struct reset_ctl port_ctl;
40*4882a593Smuzhiyun int param;
41*4882a593Smuzhiyun int ctrl;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
sti_usb_phy_deassert(struct sti_usb_phy * phy)44*4882a593Smuzhiyun static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun int ret;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun ret = reset_deassert(&phy->global_ctl);
49*4882a593Smuzhiyun if (ret < 0) {
50*4882a593Smuzhiyun pr_err("PHY global deassert failed: %d", ret);
51*4882a593Smuzhiyun return ret;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun ret = reset_deassert(&phy->port_ctl);
55*4882a593Smuzhiyun if (ret < 0)
56*4882a593Smuzhiyun pr_err("PHY port deassert failed: %d", ret);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return ret;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
sti_usb_phy_init(struct phy * usb_phy)61*4882a593Smuzhiyun static int sti_usb_phy_init(struct phy *usb_phy)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct udevice *dev = usb_phy->dev;
64*4882a593Smuzhiyun struct sti_usb_phy *phy = dev_get_priv(dev);
65*4882a593Smuzhiyun void __iomem *reg;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* set ctrl picophy value */
68*4882a593Smuzhiyun reg = (void __iomem *)phy->regmap->base + phy->ctrl;
69*4882a593Smuzhiyun /* CTRL_PORT mask is 0x1f */
70*4882a593Smuzhiyun clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* set ports parameters overriding */
73*4882a593Smuzhiyun reg = (void __iomem *)phy->regmap->base + phy->param;
74*4882a593Smuzhiyun /* PARAM_DEF mask is 0xffffffff */
75*4882a593Smuzhiyun clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return sti_usb_phy_deassert(phy);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
sti_usb_phy_exit(struct phy * usb_phy)80*4882a593Smuzhiyun static int sti_usb_phy_exit(struct phy *usb_phy)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun struct udevice *dev = usb_phy->dev;
83*4882a593Smuzhiyun struct sti_usb_phy *phy = dev_get_priv(dev);
84*4882a593Smuzhiyun int ret;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun ret = reset_assert(&phy->port_ctl);
87*4882a593Smuzhiyun if (ret < 0) {
88*4882a593Smuzhiyun pr_err("PHY port assert failed: %d", ret);
89*4882a593Smuzhiyun return ret;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ret = reset_assert(&phy->global_ctl);
93*4882a593Smuzhiyun if (ret < 0)
94*4882a593Smuzhiyun pr_err("PHY global assert failed: %d", ret);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun return ret;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun struct phy_ops sti_usb_phy_ops = {
100*4882a593Smuzhiyun .init = sti_usb_phy_init,
101*4882a593Smuzhiyun .exit = sti_usb_phy_exit,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
sti_usb_phy_probe(struct udevice * dev)104*4882a593Smuzhiyun int sti_usb_phy_probe(struct udevice *dev)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct sti_usb_phy *priv = dev_get_priv(dev);
107*4882a593Smuzhiyun struct udevice *syscon;
108*4882a593Smuzhiyun struct ofnode_phandle_args syscfg_phandle;
109*4882a593Smuzhiyun u32 cells[PHYPARAM_NB];
110*4882a593Smuzhiyun int ret, count;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* get corresponding syscon phandle */
113*4882a593Smuzhiyun ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
114*4882a593Smuzhiyun &syscfg_phandle);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (ret < 0) {
117*4882a593Smuzhiyun pr_err("Can't get syscfg phandle: %d\n", ret);
118*4882a593Smuzhiyun return ret;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node,
122*4882a593Smuzhiyun &syscon);
123*4882a593Smuzhiyun if (ret) {
124*4882a593Smuzhiyun pr_err("unable to find syscon device (%d)\n", ret);
125*4882a593Smuzhiyun return ret;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun priv->regmap = syscon_get_regmap(syscon);
129*4882a593Smuzhiyun if (!priv->regmap) {
130*4882a593Smuzhiyun pr_err("unable to find regmap\n");
131*4882a593Smuzhiyun return -ENODEV;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* get phy param offset */
135*4882a593Smuzhiyun count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
136*4882a593Smuzhiyun "st,syscfg", cells,
137*4882a593Smuzhiyun ARRAY_SIZE(cells));
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (count < 0) {
140*4882a593Smuzhiyun pr_err("Bad PHY st,syscfg property %d\n", count);
141*4882a593Smuzhiyun return -EINVAL;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (count > PHYPARAM_NB) {
145*4882a593Smuzhiyun pr_err("Unsupported PHY param count %d\n", count);
146*4882a593Smuzhiyun return -EINVAL;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun priv->param = cells[PHYPARAM_REG];
150*4882a593Smuzhiyun priv->ctrl = cells[PHYCTRL_REG];
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* get global reset control */
153*4882a593Smuzhiyun ret = reset_get_by_name(dev, "global", &priv->global_ctl);
154*4882a593Smuzhiyun if (ret) {
155*4882a593Smuzhiyun pr_err("can't get global reset for %s (%d)", dev->name, ret);
156*4882a593Smuzhiyun return ret;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /* get port reset control */
160*4882a593Smuzhiyun ret = reset_get_by_name(dev, "port", &priv->port_ctl);
161*4882a593Smuzhiyun if (ret) {
162*4882a593Smuzhiyun pr_err("can't get port reset for %s (%d)", dev->name, ret);
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun return 0;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static const struct udevice_id sti_usb_phy_ids[] = {
170*4882a593Smuzhiyun { .compatible = "st,stih407-usb2-phy" },
171*4882a593Smuzhiyun { }
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun U_BOOT_DRIVER(sti_usb_phy) = {
175*4882a593Smuzhiyun .name = "sti_usb_phy",
176*4882a593Smuzhiyun .id = UCLASS_PHY,
177*4882a593Smuzhiyun .of_match = sti_usb_phy_ids,
178*4882a593Smuzhiyun .probe = sti_usb_phy_probe,
179*4882a593Smuzhiyun .ops = &sti_usb_phy_ops,
180*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct sti_usb_phy),
181*4882a593Smuzhiyun };
182