1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2014 Google, Inc
3*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <fdtdec.h>
11*4882a593Smuzhiyun #include <inttypes.h>
12*4882a593Smuzhiyun #include <pci.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
15*4882a593Smuzhiyun
sandbox_pci_write_config(struct udevice * bus,pci_dev_t devfn,uint offset,ulong value,enum pci_size_t size)16*4882a593Smuzhiyun static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn,
17*4882a593Smuzhiyun uint offset, ulong value,
18*4882a593Smuzhiyun enum pci_size_t size)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun struct dm_pci_emul_ops *ops;
21*4882a593Smuzhiyun struct udevice *emul;
22*4882a593Smuzhiyun int ret;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun ret = sandbox_pci_get_emul(bus, devfn, &emul);
25*4882a593Smuzhiyun if (ret)
26*4882a593Smuzhiyun return ret == -ENODEV ? 0 : ret;
27*4882a593Smuzhiyun ops = pci_get_emul_ops(emul);
28*4882a593Smuzhiyun if (!ops || !ops->write_config)
29*4882a593Smuzhiyun return -ENOSYS;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun return ops->write_config(emul, offset, value, size);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
sandbox_pci_read_config(struct udevice * bus,pci_dev_t devfn,uint offset,ulong * valuep,enum pci_size_t size)34*4882a593Smuzhiyun static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn,
35*4882a593Smuzhiyun uint offset, ulong *valuep,
36*4882a593Smuzhiyun enum pci_size_t size)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct dm_pci_emul_ops *ops;
39*4882a593Smuzhiyun struct udevice *emul;
40*4882a593Smuzhiyun int ret;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* Prepare the default response */
43*4882a593Smuzhiyun *valuep = pci_get_ff(size);
44*4882a593Smuzhiyun ret = sandbox_pci_get_emul(bus, devfn, &emul);
45*4882a593Smuzhiyun if (ret)
46*4882a593Smuzhiyun return ret == -ENODEV ? 0 : ret;
47*4882a593Smuzhiyun ops = pci_get_emul_ops(emul);
48*4882a593Smuzhiyun if (!ops || !ops->read_config)
49*4882a593Smuzhiyun return -ENOSYS;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun return ops->read_config(emul, offset, valuep, size);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static const struct dm_pci_ops sandbox_pci_ops = {
55*4882a593Smuzhiyun .read_config = sandbox_pci_read_config,
56*4882a593Smuzhiyun .write_config = sandbox_pci_write_config,
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static const struct udevice_id sandbox_pci_ids[] = {
60*4882a593Smuzhiyun { .compatible = "sandbox,pci" },
61*4882a593Smuzhiyun { }
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun U_BOOT_DRIVER(pci_sandbox) = {
65*4882a593Smuzhiyun .name = "pci_sandbox",
66*4882a593Smuzhiyun .id = UCLASS_PCI,
67*4882a593Smuzhiyun .of_match = sandbox_pci_ids,
68*4882a593Smuzhiyun .ops = &sandbox_pci_ops,
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* Attach an emulator if we can */
71*4882a593Smuzhiyun .child_post_bind = dm_scan_fdt_dev,
72*4882a593Smuzhiyun .per_child_platdata_auto_alloc_size =
73*4882a593Smuzhiyun sizeof(struct pci_child_platdata),
74*4882a593Smuzhiyun };
75