xref: /OK3568_Linux_fs/u-boot/drivers/pci/pci_rom.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2014 Google, Inc
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Modifications are:
7*4882a593Smuzhiyun  * Copyright (C) 2003-2004 Linux Networx
8*4882a593Smuzhiyun  * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9*4882a593Smuzhiyun  * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10*4882a593Smuzhiyun  * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11*4882a593Smuzhiyun  * Copyright (C) 2005-2006 Tyan
12*4882a593Smuzhiyun  * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13*4882a593Smuzhiyun  * Copyright (C) 2005-2009 coresystems GmbH
14*4882a593Smuzhiyun  * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * PCI Bus Services, see include/linux/pci.h for further explanation.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19*4882a593Smuzhiyun  * David Mosberger-Tang
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <common.h>
27*4882a593Smuzhiyun #include <bios_emul.h>
28*4882a593Smuzhiyun #include <dm.h>
29*4882a593Smuzhiyun #include <errno.h>
30*4882a593Smuzhiyun #include <malloc.h>
31*4882a593Smuzhiyun #include <pci.h>
32*4882a593Smuzhiyun #include <pci_rom.h>
33*4882a593Smuzhiyun #include <vbe.h>
34*4882a593Smuzhiyun #include <video.h>
35*4882a593Smuzhiyun #include <video_fb.h>
36*4882a593Smuzhiyun #include <linux/screen_info.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #ifdef CONFIG_X86
39*4882a593Smuzhiyun #include <asm/acpi_s3.h>
40*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun 
board_should_run_oprom(struct udevice * dev)43*4882a593Smuzhiyun __weak bool board_should_run_oprom(struct udevice *dev)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
46*4882a593Smuzhiyun 	if (gd->arch.prev_sleep_state == ACPI_S3) {
47*4882a593Smuzhiyun 		if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
48*4882a593Smuzhiyun 			return true;
49*4882a593Smuzhiyun 		else
50*4882a593Smuzhiyun 			return false;
51*4882a593Smuzhiyun 	}
52*4882a593Smuzhiyun #endif
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	return true;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
board_should_load_oprom(struct udevice * dev)57*4882a593Smuzhiyun __weak bool board_should_load_oprom(struct udevice *dev)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	return true;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
board_map_oprom_vendev(uint32_t vendev)62*4882a593Smuzhiyun __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	return vendev;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
pci_rom_probe(struct udevice * dev,struct pci_rom_header ** hdrp)67*4882a593Smuzhiyun static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
70*4882a593Smuzhiyun 	struct pci_rom_header *rom_header;
71*4882a593Smuzhiyun 	struct pci_rom_data *rom_data;
72*4882a593Smuzhiyun 	u16 rom_vendor, rom_device;
73*4882a593Smuzhiyun 	u32 rom_class;
74*4882a593Smuzhiyun 	u32 vendev;
75*4882a593Smuzhiyun 	u32 mapped_vendev;
76*4882a593Smuzhiyun 	u32 rom_address;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	vendev = pplat->vendor << 16 | pplat->device;
79*4882a593Smuzhiyun 	mapped_vendev = board_map_oprom_vendev(vendev);
80*4882a593Smuzhiyun 	if (vendev != mapped_vendev)
81*4882a593Smuzhiyun 		debug("Device ID mapped to %#08x\n", mapped_vendev);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #ifdef CONFIG_VGA_BIOS_ADDR
84*4882a593Smuzhiyun 	rom_address = CONFIG_VGA_BIOS_ADDR;
85*4882a593Smuzhiyun #else
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
88*4882a593Smuzhiyun 	if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
89*4882a593Smuzhiyun 		debug("%s: rom_address=%x\n", __func__, rom_address);
90*4882a593Smuzhiyun 		return -ENOENT;
91*4882a593Smuzhiyun 	}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* Enable expansion ROM address decoding. */
94*4882a593Smuzhiyun 	dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
95*4882a593Smuzhiyun 			      rom_address | PCI_ROM_ADDRESS_ENABLE);
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun 	debug("Option ROM address %x\n", rom_address);
98*4882a593Smuzhiyun 	rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
101*4882a593Smuzhiyun 	      le16_to_cpu(rom_header->signature),
102*4882a593Smuzhiyun 	      rom_header->size * 512, le16_to_cpu(rom_header->data));
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
105*4882a593Smuzhiyun 		printf("Incorrect expansion ROM header signature %04x\n",
106*4882a593Smuzhiyun 		       le16_to_cpu(rom_header->signature));
107*4882a593Smuzhiyun #ifndef CONFIG_VGA_BIOS_ADDR
108*4882a593Smuzhiyun 		/* Disable expansion ROM address decoding */
109*4882a593Smuzhiyun 		dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
110*4882a593Smuzhiyun #endif
111*4882a593Smuzhiyun 		return -EINVAL;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
115*4882a593Smuzhiyun 	rom_vendor = le16_to_cpu(rom_data->vendor);
116*4882a593Smuzhiyun 	rom_device = le16_to_cpu(rom_data->device);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
119*4882a593Smuzhiyun 	      rom_vendor, rom_device);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	/* If the device id is mapped, a mismatch is expected */
122*4882a593Smuzhiyun 	if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
123*4882a593Smuzhiyun 	    (vendev == mapped_vendev)) {
124*4882a593Smuzhiyun 		printf("ID mismatch: vendor ID %04x, device ID %04x\n",
125*4882a593Smuzhiyun 		       rom_vendor, rom_device);
126*4882a593Smuzhiyun 		/* Continue anyway */
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
130*4882a593Smuzhiyun 	debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
131*4882a593Smuzhiyun 	      rom_class, rom_data->type);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	if (pplat->class != rom_class) {
134*4882a593Smuzhiyun 		debug("Class Code mismatch ROM %06x, dev %06x\n",
135*4882a593Smuzhiyun 		      rom_class, pplat->class);
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 	*hdrp = rom_header;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /**
143*4882a593Smuzhiyun  * pci_rom_load() - Load a ROM image and return a pointer to it
144*4882a593Smuzhiyun  *
145*4882a593Smuzhiyun  * @rom_header:		Pointer to ROM image
146*4882a593Smuzhiyun  * @ram_headerp:	Returns a pointer to the image in RAM
147*4882a593Smuzhiyun  * @allocedp:		Returns true if @ram_headerp was allocated and needs
148*4882a593Smuzhiyun  *			to be freed
149*4882a593Smuzhiyun  * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
150*4882a593Smuzhiyun  * the error state. Even if this function returns an error, it may have
151*4882a593Smuzhiyun  * allocated memory.
152*4882a593Smuzhiyun  */
pci_rom_load(struct pci_rom_header * rom_header,struct pci_rom_header ** ram_headerp,bool * allocedp)153*4882a593Smuzhiyun static int pci_rom_load(struct pci_rom_header *rom_header,
154*4882a593Smuzhiyun 			struct pci_rom_header **ram_headerp, bool *allocedp)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct pci_rom_data *rom_data;
157*4882a593Smuzhiyun 	unsigned int rom_size;
158*4882a593Smuzhiyun 	unsigned int image_size = 0;
159*4882a593Smuzhiyun 	void *target;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	*allocedp = false;
162*4882a593Smuzhiyun 	do {
163*4882a593Smuzhiyun 		/* Get next image, until we see an x86 version */
164*4882a593Smuzhiyun 		rom_header = (struct pci_rom_header *)((void *)rom_header +
165*4882a593Smuzhiyun 							    image_size);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 		rom_data = (struct pci_rom_data *)((void *)rom_header +
168*4882a593Smuzhiyun 				le16_to_cpu(rom_header->data));
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 		image_size = le16_to_cpu(rom_data->ilen) * 512;
171*4882a593Smuzhiyun 	} while ((rom_data->type != 0) && (rom_data->indicator == 0));
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (rom_data->type != 0)
174*4882a593Smuzhiyun 		return -EACCES;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	rom_size = rom_header->size * 512;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #ifdef PCI_VGA_RAM_IMAGE_START
179*4882a593Smuzhiyun 	target = (void *)PCI_VGA_RAM_IMAGE_START;
180*4882a593Smuzhiyun #else
181*4882a593Smuzhiyun 	target = (void *)malloc(rom_size);
182*4882a593Smuzhiyun 	if (!target)
183*4882a593Smuzhiyun 		return -ENOMEM;
184*4882a593Smuzhiyun 	*allocedp = true;
185*4882a593Smuzhiyun #endif
186*4882a593Smuzhiyun 	if (target != rom_header) {
187*4882a593Smuzhiyun 		ulong start = get_timer(0);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 		debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
190*4882a593Smuzhiyun 		      rom_header, target, rom_size);
191*4882a593Smuzhiyun 		memcpy(target, rom_header, rom_size);
192*4882a593Smuzhiyun 		if (memcmp(target, rom_header, rom_size)) {
193*4882a593Smuzhiyun 			printf("VGA ROM copy failed\n");
194*4882a593Smuzhiyun 			return -EFAULT;
195*4882a593Smuzhiyun 		}
196*4882a593Smuzhiyun 		debug("Copy took %lums\n", get_timer(start));
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun 	*ram_headerp = target;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun struct vbe_mode_info mode_info;
204*4882a593Smuzhiyun 
setup_video(struct screen_info * screen_info)205*4882a593Smuzhiyun void setup_video(struct screen_info *screen_info)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	struct vesa_mode_info *vesa = &mode_info.vesa;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	/* Sanity test on VESA parameters */
210*4882a593Smuzhiyun 	if (!vesa->x_resolution || !vesa->y_resolution)
211*4882a593Smuzhiyun 		return;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	screen_info->lfb_width = vesa->x_resolution;
216*4882a593Smuzhiyun 	screen_info->lfb_height = vesa->y_resolution;
217*4882a593Smuzhiyun 	screen_info->lfb_depth = vesa->bits_per_pixel;
218*4882a593Smuzhiyun 	screen_info->lfb_linelength = vesa->bytes_per_scanline;
219*4882a593Smuzhiyun 	screen_info->lfb_base = vesa->phys_base_ptr;
220*4882a593Smuzhiyun 	screen_info->lfb_size =
221*4882a593Smuzhiyun 		ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
222*4882a593Smuzhiyun 		      65536);
223*4882a593Smuzhiyun 	screen_info->lfb_size >>= 16;
224*4882a593Smuzhiyun 	screen_info->red_size = vesa->red_mask_size;
225*4882a593Smuzhiyun 	screen_info->red_pos = vesa->red_mask_pos;
226*4882a593Smuzhiyun 	screen_info->green_size = vesa->green_mask_size;
227*4882a593Smuzhiyun 	screen_info->green_pos = vesa->green_mask_pos;
228*4882a593Smuzhiyun 	screen_info->blue_size = vesa->blue_mask_size;
229*4882a593Smuzhiyun 	screen_info->blue_pos = vesa->blue_mask_pos;
230*4882a593Smuzhiyun 	screen_info->rsvd_size = vesa->reserved_mask_size;
231*4882a593Smuzhiyun 	screen_info->rsvd_pos = vesa->reserved_mask_pos;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
dm_pci_run_vga_bios(struct udevice * dev,int (* int15_handler)(void),int exec_method)234*4882a593Smuzhiyun int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
235*4882a593Smuzhiyun 			int exec_method)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
238*4882a593Smuzhiyun 	struct pci_rom_header *rom = NULL, *ram = NULL;
239*4882a593Smuzhiyun 	int vesa_mode = -1;
240*4882a593Smuzhiyun 	bool emulate, alloced;
241*4882a593Smuzhiyun 	int ret;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	/* Only execute VGA ROMs */
244*4882a593Smuzhiyun 	if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
245*4882a593Smuzhiyun 		debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
246*4882a593Smuzhiyun 		      PCI_CLASS_DISPLAY_VGA);
247*4882a593Smuzhiyun 		return -ENODEV;
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	if (!board_should_load_oprom(dev))
251*4882a593Smuzhiyun 		return -ENXIO;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	ret = pci_rom_probe(dev, &rom);
254*4882a593Smuzhiyun 	if (ret)
255*4882a593Smuzhiyun 		return ret;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	ret = pci_rom_load(rom, &ram, &alloced);
258*4882a593Smuzhiyun 	if (ret)
259*4882a593Smuzhiyun 		goto err;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	if (!board_should_run_oprom(dev)) {
262*4882a593Smuzhiyun 		ret = -ENXIO;
263*4882a593Smuzhiyun 		goto err;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
267*4882a593Smuzhiyun 		defined(CONFIG_FRAMEBUFFER_VESA_MODE)
268*4882a593Smuzhiyun 	vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
269*4882a593Smuzhiyun #endif
270*4882a593Smuzhiyun 	debug("Selected vesa mode %#x\n", vesa_mode);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	if (exec_method & PCI_ROM_USE_NATIVE) {
273*4882a593Smuzhiyun #ifdef CONFIG_X86
274*4882a593Smuzhiyun 		emulate = false;
275*4882a593Smuzhiyun #else
276*4882a593Smuzhiyun 		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
277*4882a593Smuzhiyun 			printf("BIOS native execution is only available on x86\n");
278*4882a593Smuzhiyun 			ret = -ENOSYS;
279*4882a593Smuzhiyun 			goto err;
280*4882a593Smuzhiyun 		}
281*4882a593Smuzhiyun 		emulate = true;
282*4882a593Smuzhiyun #endif
283*4882a593Smuzhiyun 	} else {
284*4882a593Smuzhiyun #ifdef CONFIG_BIOSEMU
285*4882a593Smuzhiyun 		emulate = true;
286*4882a593Smuzhiyun #else
287*4882a593Smuzhiyun 		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
288*4882a593Smuzhiyun 			printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
289*4882a593Smuzhiyun 			ret = -ENOSYS;
290*4882a593Smuzhiyun 			goto err;
291*4882a593Smuzhiyun 		}
292*4882a593Smuzhiyun 		emulate = false;
293*4882a593Smuzhiyun #endif
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	if (emulate) {
297*4882a593Smuzhiyun #ifdef CONFIG_BIOSEMU
298*4882a593Smuzhiyun 		BE_VGAInfo *info;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 		ret = biosemu_setup(dev, &info);
301*4882a593Smuzhiyun 		if (ret)
302*4882a593Smuzhiyun 			goto err;
303*4882a593Smuzhiyun 		biosemu_set_interrupt_handler(0x15, int15_handler);
304*4882a593Smuzhiyun 		ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
305*4882a593Smuzhiyun 				  true, vesa_mode, &mode_info);
306*4882a593Smuzhiyun 		if (ret)
307*4882a593Smuzhiyun 			goto err;
308*4882a593Smuzhiyun #endif
309*4882a593Smuzhiyun 	} else {
310*4882a593Smuzhiyun #if defined(CONFIG_X86) && CONFIG_IS_ENABLED(X86_32BIT_INIT)
311*4882a593Smuzhiyun 		bios_set_interrupt_handler(0x15, int15_handler);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 		bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
314*4882a593Smuzhiyun 				&mode_info);
315*4882a593Smuzhiyun #endif
316*4882a593Smuzhiyun 	}
317*4882a593Smuzhiyun 	debug("Final vesa mode %#x\n", mode_info.video_mode);
318*4882a593Smuzhiyun 	ret = 0;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun err:
321*4882a593Smuzhiyun 	if (alloced)
322*4882a593Smuzhiyun 		free(ram);
323*4882a593Smuzhiyun 	return ret;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun #ifdef CONFIG_DM_VIDEO
vbe_setup_video_priv(struct vesa_mode_info * vesa,struct video_priv * uc_priv,struct video_uc_platdata * plat)327*4882a593Smuzhiyun int vbe_setup_video_priv(struct vesa_mode_info *vesa,
328*4882a593Smuzhiyun 			 struct video_priv *uc_priv,
329*4882a593Smuzhiyun 			 struct video_uc_platdata *plat)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun 	if (!vesa->x_resolution)
332*4882a593Smuzhiyun 		return -ENXIO;
333*4882a593Smuzhiyun 	uc_priv->xsize = vesa->x_resolution;
334*4882a593Smuzhiyun 	uc_priv->ysize = vesa->y_resolution;
335*4882a593Smuzhiyun 	switch (vesa->bits_per_pixel) {
336*4882a593Smuzhiyun 	case 32:
337*4882a593Smuzhiyun 	case 24:
338*4882a593Smuzhiyun 		uc_priv->bpix = VIDEO_BPP32;
339*4882a593Smuzhiyun 		break;
340*4882a593Smuzhiyun 	case 16:
341*4882a593Smuzhiyun 		uc_priv->bpix = VIDEO_BPP16;
342*4882a593Smuzhiyun 		break;
343*4882a593Smuzhiyun 	default:
344*4882a593Smuzhiyun 		return -EPROTONOSUPPORT;
345*4882a593Smuzhiyun 	}
346*4882a593Smuzhiyun 	plat->base = vesa->phys_base_ptr;
347*4882a593Smuzhiyun 	plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	return 0;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun 
vbe_setup_video(struct udevice * dev,int (* int15_handler)(void))352*4882a593Smuzhiyun int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
355*4882a593Smuzhiyun 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
356*4882a593Smuzhiyun 	int ret;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	printf("Video: ");
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	/* If we are running from EFI or coreboot, this can't work */
361*4882a593Smuzhiyun 	if (!ll_boot_init()) {
362*4882a593Smuzhiyun 		printf("Not available (previous bootloader prevents it)\n");
363*4882a593Smuzhiyun 		return -EPERM;
364*4882a593Smuzhiyun 	}
365*4882a593Smuzhiyun 	bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
366*4882a593Smuzhiyun 	ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
367*4882a593Smuzhiyun 					PCI_ROM_ALLOW_FALLBACK);
368*4882a593Smuzhiyun 	bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
369*4882a593Smuzhiyun 	if (ret) {
370*4882a593Smuzhiyun 		debug("failed to run video BIOS: %d\n", ret);
371*4882a593Smuzhiyun 		return ret;
372*4882a593Smuzhiyun 	}
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
375*4882a593Smuzhiyun 	if (ret) {
376*4882a593Smuzhiyun 		debug("No video mode configured\n");
377*4882a593Smuzhiyun 		return ret;
378*4882a593Smuzhiyun 	}
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
381*4882a593Smuzhiyun 	       mode_info.vesa.bits_per_pixel);
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	return 0;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun #endif
386