1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * PCI auto-configuration library
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: Matt Porter <mporter@mvista.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright 2000 MontaVista Software Inc.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Modifications for driver model:
9*4882a593Smuzhiyun * Copyright 2015 Google, Inc
10*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <common.h>
16*4882a593Smuzhiyun #include <dm.h>
17*4882a593Smuzhiyun #include <errno.h>
18*4882a593Smuzhiyun #include <pci.h>
19*4882a593Smuzhiyun
pciauto_region_init(struct pci_region * res)20*4882a593Smuzhiyun void pciauto_region_init(struct pci_region *res)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * Avoid allocating PCI resources from address 0 -- this is illegal
24*4882a593Smuzhiyun * according to PCI 2.1 and moreover, this is known to cause Linux IDE
25*4882a593Smuzhiyun * drivers to fail. Use a reasonable starting value of 0x1000 instead.
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun res->bus_lower = res->bus_start ? res->bus_start : 0x1000;
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
pciauto_region_align(struct pci_region * res,pci_size_t size)30*4882a593Smuzhiyun void pciauto_region_align(struct pci_region *res, pci_size_t size)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
pciauto_region_allocate(struct pci_region * res,pci_size_t size,pci_addr_t * bar)35*4882a593Smuzhiyun int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
36*4882a593Smuzhiyun pci_addr_t *bar)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun pci_addr_t addr;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (!res) {
41*4882a593Smuzhiyun debug("No resource");
42*4882a593Smuzhiyun goto error;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun addr = ((res->bus_lower - 1) | (size - 1)) + 1;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (addr - res->bus_start + size > res->size) {
48*4882a593Smuzhiyun debug("No room in resource");
49*4882a593Smuzhiyun goto error;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun res->bus_lower = addr + size;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun debug("address=0x%llx bus_lower=0x%llx", (unsigned long long)addr,
55*4882a593Smuzhiyun (unsigned long long)res->bus_lower);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun *bar = addr;
58*4882a593Smuzhiyun return 0;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun error:
61*4882a593Smuzhiyun *bar = (pci_addr_t)-1;
62*4882a593Smuzhiyun return -1;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
pciauto_show_region(const char * name,struct pci_region * region)65*4882a593Smuzhiyun static void pciauto_show_region(const char *name, struct pci_region *region)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun pciauto_region_init(region);
68*4882a593Smuzhiyun debug("PCI Autoconfig: Bus %s region: [%llx-%llx],\n"
69*4882a593Smuzhiyun "\t\tPhysical Memory [%llx-%llxx]\n", name,
70*4882a593Smuzhiyun (unsigned long long)region->bus_start,
71*4882a593Smuzhiyun (unsigned long long)(region->bus_start + region->size - 1),
72*4882a593Smuzhiyun (unsigned long long)region->phys_start,
73*4882a593Smuzhiyun (unsigned long long)(region->phys_start + region->size - 1));
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
pciauto_config_init(struct pci_controller * hose)76*4882a593Smuzhiyun void pciauto_config_init(struct pci_controller *hose)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun int i;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun hose->pci_io = NULL;
81*4882a593Smuzhiyun hose->pci_mem = NULL;
82*4882a593Smuzhiyun hose->pci_prefetch = NULL;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun for (i = 0; i < hose->region_count; i++) {
85*4882a593Smuzhiyun switch (hose->regions[i].flags) {
86*4882a593Smuzhiyun case PCI_REGION_IO:
87*4882a593Smuzhiyun if (!hose->pci_io ||
88*4882a593Smuzhiyun hose->pci_io->size < hose->regions[i].size)
89*4882a593Smuzhiyun hose->pci_io = hose->regions + i;
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun case PCI_REGION_MEM:
92*4882a593Smuzhiyun if (!hose->pci_mem ||
93*4882a593Smuzhiyun hose->pci_mem->size < hose->regions[i].size)
94*4882a593Smuzhiyun hose->pci_mem = hose->regions + i;
95*4882a593Smuzhiyun break;
96*4882a593Smuzhiyun case (PCI_REGION_MEM | PCI_REGION_PREFETCH):
97*4882a593Smuzhiyun if (!hose->pci_prefetch ||
98*4882a593Smuzhiyun hose->pci_prefetch->size < hose->regions[i].size)
99*4882a593Smuzhiyun hose->pci_prefetch = hose->regions + i;
100*4882a593Smuzhiyun break;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun if (hose->pci_mem)
106*4882a593Smuzhiyun pciauto_show_region("Memory", hose->pci_mem);
107*4882a593Smuzhiyun if (hose->pci_prefetch)
108*4882a593Smuzhiyun pciauto_show_region("Prefetchable Mem", hose->pci_prefetch);
109*4882a593Smuzhiyun if (hose->pci_io)
110*4882a593Smuzhiyun pciauto_show_region("I/O", hose->pci_io);
111*4882a593Smuzhiyun }
112