1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * SMSC LAN9[12]1[567] Network driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <command.h>
11*4882a593Smuzhiyun #include <malloc.h>
12*4882a593Smuzhiyun #include <net.h>
13*4882a593Smuzhiyun #include <miiphy.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "smc911x.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun u32 pkt_data_pull(struct eth_device *dev, u32 addr) \
18*4882a593Smuzhiyun __attribute__ ((weak, alias ("smc911x_reg_read")));
19*4882a593Smuzhiyun void pkt_data_push(struct eth_device *dev, u32 addr, u32 val) \
20*4882a593Smuzhiyun __attribute__ ((weak, alias ("smc911x_reg_write")));
21*4882a593Smuzhiyun
smc911x_handle_mac_address(struct eth_device * dev)22*4882a593Smuzhiyun static void smc911x_handle_mac_address(struct eth_device *dev)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun unsigned long addrh, addrl;
25*4882a593Smuzhiyun uchar *m = dev->enetaddr;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
28*4882a593Smuzhiyun addrh = m[4] | (m[5] << 8);
29*4882a593Smuzhiyun smc911x_set_mac_csr(dev, ADDRL, addrl);
30*4882a593Smuzhiyun smc911x_set_mac_csr(dev, ADDRH, addrh);
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun printf(DRIVERNAME ": MAC %pM\n", m);
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
smc911x_eth_phy_read(struct eth_device * dev,u8 phy,u8 reg,u16 * val)35*4882a593Smuzhiyun static int smc911x_eth_phy_read(struct eth_device *dev,
36*4882a593Smuzhiyun u8 phy, u8 reg, u16 *val)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
39*4882a593Smuzhiyun ;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun smc911x_set_mac_csr(dev, MII_ACC, phy << 11 | reg << 6 |
42*4882a593Smuzhiyun MII_ACC_MII_BUSY);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
45*4882a593Smuzhiyun ;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun *val = smc911x_get_mac_csr(dev, MII_DATA);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
smc911x_eth_phy_write(struct eth_device * dev,u8 phy,u8 reg,u16 val)52*4882a593Smuzhiyun static int smc911x_eth_phy_write(struct eth_device *dev,
53*4882a593Smuzhiyun u8 phy, u8 reg, u16 val)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
56*4882a593Smuzhiyun ;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun smc911x_set_mac_csr(dev, MII_DATA, val);
59*4882a593Smuzhiyun smc911x_set_mac_csr(dev, MII_ACC,
60*4882a593Smuzhiyun phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
63*4882a593Smuzhiyun ;
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
smc911x_phy_reset(struct eth_device * dev)67*4882a593Smuzhiyun static int smc911x_phy_reset(struct eth_device *dev)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun u32 reg;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun reg = smc911x_reg_read(dev, PMT_CTRL);
72*4882a593Smuzhiyun reg &= ~0xfffff030;
73*4882a593Smuzhiyun reg |= PMT_CTRL_PHY_RST;
74*4882a593Smuzhiyun smc911x_reg_write(dev, PMT_CTRL, reg);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun mdelay(100);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
smc911x_phy_configure(struct eth_device * dev)81*4882a593Smuzhiyun static void smc911x_phy_configure(struct eth_device *dev)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun int timeout;
84*4882a593Smuzhiyun u16 status;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun smc911x_phy_reset(dev);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET);
89*4882a593Smuzhiyun mdelay(1);
90*4882a593Smuzhiyun smc911x_eth_phy_write(dev, 1, MII_ADVERTISE, 0x01e1);
91*4882a593Smuzhiyun smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_ANENABLE |
92*4882a593Smuzhiyun BMCR_ANRESTART);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun timeout = 5000;
95*4882a593Smuzhiyun do {
96*4882a593Smuzhiyun mdelay(1);
97*4882a593Smuzhiyun if ((timeout--) == 0)
98*4882a593Smuzhiyun goto err_out;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if (smc911x_eth_phy_read(dev, 1, MII_BMSR, &status) != 0)
101*4882a593Smuzhiyun goto err_out;
102*4882a593Smuzhiyun } while (!(status & BMSR_LSTATUS));
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun printf(DRIVERNAME ": phy initialized\n");
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun err_out:
109*4882a593Smuzhiyun printf(DRIVERNAME ": autonegotiation timed out\n");
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
smc911x_enable(struct eth_device * dev)112*4882a593Smuzhiyun static void smc911x_enable(struct eth_device *dev)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun /* Enable TX */
115*4882a593Smuzhiyun smc911x_reg_write(dev, HW_CFG, 8 << 16 | HW_CFG_SF);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun smc911x_reg_write(dev, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun smc911x_reg_write(dev, TX_CFG, TX_CFG_TX_ON);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* no padding to start of packets */
122*4882a593Smuzhiyun smc911x_reg_write(dev, RX_CFG, 0);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun smc911x_set_mac_csr(dev, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
125*4882a593Smuzhiyun MAC_CR_HBDIS);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
smc911x_init(struct eth_device * dev,bd_t * bd)129*4882a593Smuzhiyun static int smc911x_init(struct eth_device *dev, bd_t * bd)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun struct chip_id *id = dev->priv;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun printf(DRIVERNAME ": detected %s controller\n", id->name);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun smc911x_reset(dev);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Configure the PHY, initialize the link state */
138*4882a593Smuzhiyun smc911x_phy_configure(dev);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun smc911x_handle_mac_address(dev);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* Turn on Tx + Rx */
143*4882a593Smuzhiyun smc911x_enable(dev);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return 0;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
smc911x_send(struct eth_device * dev,void * packet,int length)148*4882a593Smuzhiyun static int smc911x_send(struct eth_device *dev, void *packet, int length)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun u32 *data = (u32*)packet;
151*4882a593Smuzhiyun u32 tmplen;
152*4882a593Smuzhiyun u32 status;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun smc911x_reg_write(dev, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
155*4882a593Smuzhiyun TX_CMD_A_INT_LAST_SEG | length);
156*4882a593Smuzhiyun smc911x_reg_write(dev, TX_DATA_FIFO, length);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun tmplen = (length + 3) / 4;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun while (tmplen--)
161*4882a593Smuzhiyun pkt_data_push(dev, TX_DATA_FIFO, *data++);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* wait for transmission */
164*4882a593Smuzhiyun while (!((smc911x_reg_read(dev, TX_FIFO_INF) &
165*4882a593Smuzhiyun TX_FIFO_INF_TSUSED) >> 16));
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* get status. Ignore 'no carrier' error, it has no meaning for
168*4882a593Smuzhiyun * full duplex operation
169*4882a593Smuzhiyun */
170*4882a593Smuzhiyun status = smc911x_reg_read(dev, TX_STATUS_FIFO) &
171*4882a593Smuzhiyun (TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
172*4882a593Smuzhiyun TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun if (!status)
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
178*4882a593Smuzhiyun status & TX_STS_LOC ? "TX_STS_LOC " : "",
179*4882a593Smuzhiyun status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
180*4882a593Smuzhiyun status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
181*4882a593Smuzhiyun status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
182*4882a593Smuzhiyun status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun return -1;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
smc911x_halt(struct eth_device * dev)187*4882a593Smuzhiyun static void smc911x_halt(struct eth_device *dev)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun smc911x_reset(dev);
190*4882a593Smuzhiyun smc911x_handle_mac_address(dev);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
smc911x_rx(struct eth_device * dev)193*4882a593Smuzhiyun static int smc911x_rx(struct eth_device *dev)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun u32 *data = (u32 *)net_rx_packets[0];
196*4882a593Smuzhiyun u32 pktlen, tmplen;
197*4882a593Smuzhiyun u32 status;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if ((smc911x_reg_read(dev, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16) {
200*4882a593Smuzhiyun status = smc911x_reg_read(dev, RX_STATUS_FIFO);
201*4882a593Smuzhiyun pktlen = (status & RX_STS_PKT_LEN) >> 16;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun smc911x_reg_write(dev, RX_CFG, 0);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun tmplen = (pktlen + 3) / 4;
206*4882a593Smuzhiyun while (tmplen--)
207*4882a593Smuzhiyun *data++ = pkt_data_pull(dev, RX_DATA_FIFO);
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun if (status & RX_STS_ES)
210*4882a593Smuzhiyun printf(DRIVERNAME
211*4882a593Smuzhiyun ": dropped bad packet. Status: 0x%08x\n",
212*4882a593Smuzhiyun status);
213*4882a593Smuzhiyun else
214*4882a593Smuzhiyun net_process_received_packet(net_rx_packets[0], pktlen);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun return 0;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
221*4882a593Smuzhiyun /* wrapper for smc911x_eth_phy_read */
smc911x_miiphy_read(struct mii_dev * bus,int phy,int devad,int reg)222*4882a593Smuzhiyun static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
223*4882a593Smuzhiyun int reg)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun u16 val = 0;
226*4882a593Smuzhiyun struct eth_device *dev = eth_get_dev_by_name(bus->name);
227*4882a593Smuzhiyun if (dev) {
228*4882a593Smuzhiyun int retval = smc911x_eth_phy_read(dev, phy, reg, &val);
229*4882a593Smuzhiyun if (retval < 0)
230*4882a593Smuzhiyun return retval;
231*4882a593Smuzhiyun return val;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun return -ENODEV;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun /* wrapper for smc911x_eth_phy_write */
smc911x_miiphy_write(struct mii_dev * bus,int phy,int devad,int reg,u16 val)236*4882a593Smuzhiyun static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
237*4882a593Smuzhiyun int reg, u16 val)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct eth_device *dev = eth_get_dev_by_name(bus->name);
240*4882a593Smuzhiyun if (dev)
241*4882a593Smuzhiyun return smc911x_eth_phy_write(dev, phy, reg, val);
242*4882a593Smuzhiyun return -ENODEV;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun #endif
245*4882a593Smuzhiyun
smc911x_initialize(u8 dev_num,int base_addr)246*4882a593Smuzhiyun int smc911x_initialize(u8 dev_num, int base_addr)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun unsigned long addrl, addrh;
249*4882a593Smuzhiyun struct eth_device *dev;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun dev = malloc(sizeof(*dev));
252*4882a593Smuzhiyun if (!dev) {
253*4882a593Smuzhiyun return -1;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun memset(dev, 0, sizeof(*dev));
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun dev->iobase = base_addr;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* Try to detect chip. Will fail if not present. */
260*4882a593Smuzhiyun if (smc911x_detect_chip(dev)) {
261*4882a593Smuzhiyun free(dev);
262*4882a593Smuzhiyun return 0;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun addrh = smc911x_get_mac_csr(dev, ADDRH);
266*4882a593Smuzhiyun addrl = smc911x_get_mac_csr(dev, ADDRL);
267*4882a593Smuzhiyun if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
268*4882a593Smuzhiyun /* address is obtained from optional eeprom */
269*4882a593Smuzhiyun dev->enetaddr[0] = addrl;
270*4882a593Smuzhiyun dev->enetaddr[1] = addrl >> 8;
271*4882a593Smuzhiyun dev->enetaddr[2] = addrl >> 16;
272*4882a593Smuzhiyun dev->enetaddr[3] = addrl >> 24;
273*4882a593Smuzhiyun dev->enetaddr[4] = addrh;
274*4882a593Smuzhiyun dev->enetaddr[5] = addrh >> 8;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun dev->init = smc911x_init;
278*4882a593Smuzhiyun dev->halt = smc911x_halt;
279*4882a593Smuzhiyun dev->send = smc911x_send;
280*4882a593Smuzhiyun dev->recv = smc911x_rx;
281*4882a593Smuzhiyun sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun eth_register(dev);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
286*4882a593Smuzhiyun int retval;
287*4882a593Smuzhiyun struct mii_dev *mdiodev = mdio_alloc();
288*4882a593Smuzhiyun if (!mdiodev)
289*4882a593Smuzhiyun return -ENOMEM;
290*4882a593Smuzhiyun strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
291*4882a593Smuzhiyun mdiodev->read = smc911x_miiphy_read;
292*4882a593Smuzhiyun mdiodev->write = smc911x_miiphy_write;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun retval = mdio_register(mdiodev);
295*4882a593Smuzhiyun if (retval < 0)
296*4882a593Smuzhiyun return retval;
297*4882a593Smuzhiyun #endif
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return 1;
300*4882a593Smuzhiyun }
301