1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2017 NXP Semiconductors
3*4882a593Smuzhiyun * Copyright (C) 2014 Freescale Semiconductor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <errno.h>
9*4882a593Smuzhiyun #include <linux/bug.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <linux/libfdt.h>
12*4882a593Smuzhiyun #include <net.h>
13*4882a593Smuzhiyun #include <fdt_support.h>
14*4882a593Smuzhiyun #include <fsl-mc/fsl_mc.h>
15*4882a593Smuzhiyun #include <fsl-mc/fsl_mc_sys.h>
16*4882a593Smuzhiyun #include <fsl-mc/fsl_mc_private.h>
17*4882a593Smuzhiyun #include <fsl-mc/fsl_dpmng.h>
18*4882a593Smuzhiyun #include <fsl-mc/fsl_dprc.h>
19*4882a593Smuzhiyun #include <fsl-mc/fsl_dpio.h>
20*4882a593Smuzhiyun #include <fsl-mc/fsl_dpni.h>
21*4882a593Smuzhiyun #include <fsl-mc/fsl_qbman_portal.h>
22*4882a593Smuzhiyun #include <fsl-mc/ldpaa_wriop.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
25*4882a593Smuzhiyun #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
26*4882a593Smuzhiyun #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
29*4882a593Smuzhiyun #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
30*4882a593Smuzhiyun #define MC_BOOT_ENV_VAR "mcinitcmd"
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
33*4882a593Smuzhiyun static int mc_boot_status = -1;
34*4882a593Smuzhiyun static int mc_dpl_applied = -1;
35*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
36*4882a593Smuzhiyun static int mc_aiop_applied = -1;
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun struct fsl_mc_io *root_mc_io = NULL;
39*4882a593Smuzhiyun struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
40*4882a593Smuzhiyun uint16_t root_dprc_handle = 0;
41*4882a593Smuzhiyun uint16_t dflt_dprc_handle = 0;
42*4882a593Smuzhiyun int child_dprc_id;
43*4882a593Smuzhiyun struct fsl_dpbp_obj *dflt_dpbp = NULL;
44*4882a593Smuzhiyun struct fsl_dpio_obj *dflt_dpio = NULL;
45*4882a593Smuzhiyun struct fsl_dpni_obj *dflt_dpni = NULL;
46*4882a593Smuzhiyun static u64 mc_lazy_dpl_addr;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #ifdef DEBUG
dump_ram_words(const char * title,void * addr)49*4882a593Smuzhiyun void dump_ram_words(const char *title, void *addr)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun int i;
52*4882a593Smuzhiyun uint32_t *words = addr;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun printf("Dumping beginning of %s (%p):\n", title, addr);
55*4882a593Smuzhiyun for (i = 0; i < 16; i++)
56*4882a593Smuzhiyun printf("%#x ", words[i]);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun printf("\n");
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem * mc_ccsr_regs)61*4882a593Smuzhiyun void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun printf("MC CCSR registers:\n"
64*4882a593Smuzhiyun "reg_gcr1 %#x\n"
65*4882a593Smuzhiyun "reg_gsr %#x\n"
66*4882a593Smuzhiyun "reg_sicbalr %#x\n"
67*4882a593Smuzhiyun "reg_sicbahr %#x\n"
68*4882a593Smuzhiyun "reg_sicapr %#x\n"
69*4882a593Smuzhiyun "reg_mcfbalr %#x\n"
70*4882a593Smuzhiyun "reg_mcfbahr %#x\n"
71*4882a593Smuzhiyun "reg_mcfapr %#x\n"
72*4882a593Smuzhiyun "reg_psr %#x\n",
73*4882a593Smuzhiyun mc_ccsr_regs->reg_gcr1,
74*4882a593Smuzhiyun mc_ccsr_regs->reg_gsr,
75*4882a593Smuzhiyun mc_ccsr_regs->reg_sicbalr,
76*4882a593Smuzhiyun mc_ccsr_regs->reg_sicbahr,
77*4882a593Smuzhiyun mc_ccsr_regs->reg_sicapr,
78*4882a593Smuzhiyun mc_ccsr_regs->reg_mcfbalr,
79*4882a593Smuzhiyun mc_ccsr_regs->reg_mcfbahr,
80*4882a593Smuzhiyun mc_ccsr_regs->reg_mcfapr,
81*4882a593Smuzhiyun mc_ccsr_regs->reg_psr);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun #else
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #define dump_ram_words(title, addr)
86*4882a593Smuzhiyun #define dump_mc_ccsr_regs(mc_ccsr_regs)
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #endif /* DEBUG */
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
91*4882a593Smuzhiyun /**
92*4882a593Smuzhiyun * Copying MC firmware or DPL image to DDR
93*4882a593Smuzhiyun */
mc_copy_image(const char * title,u64 image_addr,u32 image_size,u64 mc_ram_addr)94*4882a593Smuzhiyun static int mc_copy_image(const char *title,
95*4882a593Smuzhiyun u64 image_addr, u32 image_size, u64 mc_ram_addr)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
98*4882a593Smuzhiyun memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
99*4882a593Smuzhiyun flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
100*4882a593Smuzhiyun return 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /**
104*4882a593Smuzhiyun * MC firmware FIT image parser checks if the image is in FIT
105*4882a593Smuzhiyun * format, verifies integrity of the image and calculates
106*4882a593Smuzhiyun * raw image address and size values.
107*4882a593Smuzhiyun * Returns 0 on success and a negative errno on error.
108*4882a593Smuzhiyun * task fail.
109*4882a593Smuzhiyun **/
parse_mc_firmware_fit_image(u64 mc_fw_addr,const void ** raw_image_addr,size_t * raw_image_size)110*4882a593Smuzhiyun int parse_mc_firmware_fit_image(u64 mc_fw_addr,
111*4882a593Smuzhiyun const void **raw_image_addr,
112*4882a593Smuzhiyun size_t *raw_image_size)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun int format;
115*4882a593Smuzhiyun void *fit_hdr;
116*4882a593Smuzhiyun int node_offset;
117*4882a593Smuzhiyun const void *data;
118*4882a593Smuzhiyun size_t size;
119*4882a593Smuzhiyun const char *uname = "firmware";
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun fit_hdr = (void *)mc_fw_addr;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* Check if Image is in FIT format */
124*4882a593Smuzhiyun format = genimg_get_format(fit_hdr);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (format != IMAGE_FORMAT_FIT) {
127*4882a593Smuzhiyun printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
128*4882a593Smuzhiyun return -EINVAL;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (!fit_check_format(fit_hdr)) {
132*4882a593Smuzhiyun printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
133*4882a593Smuzhiyun return -EINVAL;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun node_offset = fit_image_get_node(fit_hdr, uname);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun if (node_offset < 0) {
139*4882a593Smuzhiyun printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
140*4882a593Smuzhiyun return -ENOENT;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Verify MC firmware image */
144*4882a593Smuzhiyun if (!(fit_image_verify(fit_hdr, node_offset))) {
145*4882a593Smuzhiyun printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
146*4882a593Smuzhiyun return -EINVAL;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun /* Get address and size of raw image */
150*4882a593Smuzhiyun fit_image_get_data(fit_hdr, node_offset, &data, &size);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun *raw_image_addr = data;
153*4882a593Smuzhiyun *raw_image_size = size;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun return 0;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun #endif
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun #define MC_DT_INCREASE_SIZE 64
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun enum mc_fixup_type {
162*4882a593Smuzhiyun MC_FIXUP_DPL,
163*4882a593Smuzhiyun MC_FIXUP_DPC
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun
mc_fixup_mac_addr(void * blob,int nodeoffset,const char * propname,struct eth_device * eth_dev,enum mc_fixup_type type)166*4882a593Smuzhiyun static int mc_fixup_mac_addr(void *blob, int nodeoffset,
167*4882a593Smuzhiyun const char *propname, struct eth_device *eth_dev,
168*4882a593Smuzhiyun enum mc_fixup_type type)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun int err = 0, len = 0, size, i;
171*4882a593Smuzhiyun unsigned char env_enetaddr[ARP_HLEN];
172*4882a593Smuzhiyun unsigned int enetaddr_32[ARP_HLEN];
173*4882a593Smuzhiyun void *val = NULL;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun switch (type) {
176*4882a593Smuzhiyun case MC_FIXUP_DPL:
177*4882a593Smuzhiyun /* DPL likes its addresses on 32 * ARP_HLEN bits */
178*4882a593Smuzhiyun for (i = 0; i < ARP_HLEN; i++)
179*4882a593Smuzhiyun enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]);
180*4882a593Smuzhiyun val = enetaddr_32;
181*4882a593Smuzhiyun len = sizeof(enetaddr_32);
182*4882a593Smuzhiyun break;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun case MC_FIXUP_DPC:
185*4882a593Smuzhiyun val = eth_dev->enetaddr;
186*4882a593Smuzhiyun len = ARP_HLEN;
187*4882a593Smuzhiyun break;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* MAC address property present */
191*4882a593Smuzhiyun if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
192*4882a593Smuzhiyun /* u-boot MAC addr randomly assigned - leave the present one */
193*4882a593Smuzhiyun if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index,
194*4882a593Smuzhiyun env_enetaddr))
195*4882a593Smuzhiyun return err;
196*4882a593Smuzhiyun } else {
197*4882a593Smuzhiyun size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
198*4882a593Smuzhiyun /* make room for mac address property */
199*4882a593Smuzhiyun err = fdt_increase_size(blob, size);
200*4882a593Smuzhiyun if (err) {
201*4882a593Smuzhiyun printf("fdt_increase_size: err=%s\n",
202*4882a593Smuzhiyun fdt_strerror(err));
203*4882a593Smuzhiyun return err;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun err = fdt_setprop(blob, nodeoffset, propname, val, len);
208*4882a593Smuzhiyun if (err) {
209*4882a593Smuzhiyun printf("fdt_setprop: err=%s\n", fdt_strerror(err));
210*4882a593Smuzhiyun return err;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun return err;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun #define is_dpni(s) (s != NULL ? !strncmp(s, "dpni@", 5) : 0)
217*4882a593Smuzhiyun
dpl_get_connection_endpoint(void * blob,char * endpoint)218*4882a593Smuzhiyun const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun int connoffset = fdt_path_offset(blob, "/connections"), off;
221*4882a593Smuzhiyun const char *s1, *s2;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun for (off = fdt_first_subnode(blob, connoffset);
224*4882a593Smuzhiyun off >= 0;
225*4882a593Smuzhiyun off = fdt_next_subnode(blob, off)) {
226*4882a593Smuzhiyun s1 = fdt_stringlist_get(blob, off, "endpoint1", 0, NULL);
227*4882a593Smuzhiyun s2 = fdt_stringlist_get(blob, off, "endpoint2", 0, NULL);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (!s1 || !s2)
230*4882a593Smuzhiyun continue;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (strcmp(endpoint, s1) == 0)
233*4882a593Smuzhiyun return s2;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (strcmp(endpoint, s2) == 0)
236*4882a593Smuzhiyun return s1;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun return NULL;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
mc_fixup_dpl_mac_addr(void * blob,int dpmac_id,struct eth_device * eth_dev)242*4882a593Smuzhiyun static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
243*4882a593Smuzhiyun struct eth_device *eth_dev)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun int objoff = fdt_path_offset(blob, "/objects");
246*4882a593Smuzhiyun int dpmacoff = -1, dpnioff = -1;
247*4882a593Smuzhiyun const char *endpoint;
248*4882a593Smuzhiyun char mac_name[10];
249*4882a593Smuzhiyun int err;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun sprintf(mac_name, "dpmac@%d", dpmac_id);
252*4882a593Smuzhiyun dpmacoff = fdt_subnode_offset(blob, objoff, mac_name);
253*4882a593Smuzhiyun if (dpmacoff < 0)
254*4882a593Smuzhiyun /* dpmac not defined in DPL, so skip it. */
255*4882a593Smuzhiyun return 0;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun err = mc_fixup_mac_addr(blob, dpmacoff, "mac_addr", eth_dev,
258*4882a593Smuzhiyun MC_FIXUP_DPL);
259*4882a593Smuzhiyun if (err) {
260*4882a593Smuzhiyun printf("Error fixing up dpmac mac_addr in DPL\n");
261*4882a593Smuzhiyun return err;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* now we need to figure out if there is any
265*4882a593Smuzhiyun * DPNI connected to this MAC, so we walk the
266*4882a593Smuzhiyun * connection list
267*4882a593Smuzhiyun */
268*4882a593Smuzhiyun endpoint = dpl_get_connection_endpoint(blob, mac_name);
269*4882a593Smuzhiyun if (!is_dpni(endpoint))
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* let's see if we can fixup the DPNI as well */
273*4882a593Smuzhiyun dpnioff = fdt_subnode_offset(blob, objoff, endpoint);
274*4882a593Smuzhiyun if (dpnioff < 0)
275*4882a593Smuzhiyun /* DPNI not defined in DPL in the objects area */
276*4882a593Smuzhiyun return 0;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun return mc_fixup_mac_addr(blob, dpnioff, "mac_addr", eth_dev,
279*4882a593Smuzhiyun MC_FIXUP_DPL);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
mc_fixup_dpc_mac_addr(void * blob,int dpmac_id,struct eth_device * eth_dev)282*4882a593Smuzhiyun static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
283*4882a593Smuzhiyun struct eth_device *eth_dev)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun int nodeoffset = fdt_path_offset(blob, "/board_info/ports"), noff;
286*4882a593Smuzhiyun int err = 0;
287*4882a593Smuzhiyun char mac_name[10];
288*4882a593Smuzhiyun const char link_type_mode[] = "MAC_LINK_TYPE_FIXED";
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun sprintf(mac_name, "mac@%d", dpmac_id);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* node not found - create it */
293*4882a593Smuzhiyun noff = fdt_subnode_offset(blob, nodeoffset, (const char *)mac_name);
294*4882a593Smuzhiyun if (noff < 0) {
295*4882a593Smuzhiyun err = fdt_increase_size(blob, 200);
296*4882a593Smuzhiyun if (err) {
297*4882a593Smuzhiyun printf("fdt_increase_size: err=%s\n",
298*4882a593Smuzhiyun fdt_strerror(err));
299*4882a593Smuzhiyun return err;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun noff = fdt_add_subnode(blob, nodeoffset, mac_name);
303*4882a593Smuzhiyun if (noff < 0) {
304*4882a593Smuzhiyun printf("fdt_add_subnode: err=%s\n",
305*4882a593Smuzhiyun fdt_strerror(err));
306*4882a593Smuzhiyun return err;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* add default property of fixed link */
310*4882a593Smuzhiyun err = fdt_appendprop_string(blob, noff,
311*4882a593Smuzhiyun "link_type", link_type_mode);
312*4882a593Smuzhiyun if (err) {
313*4882a593Smuzhiyun printf("fdt_appendprop_string: err=%s\n",
314*4882a593Smuzhiyun fdt_strerror(err));
315*4882a593Smuzhiyun return err;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun return mc_fixup_mac_addr(blob, noff, "port_mac_address", eth_dev,
320*4882a593Smuzhiyun MC_FIXUP_DPC);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
mc_fixup_mac_addrs(void * blob,enum mc_fixup_type type)323*4882a593Smuzhiyun static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun int i, err = 0, ret = 0;
326*4882a593Smuzhiyun char ethname[10];
327*4882a593Smuzhiyun struct eth_device *eth_dev;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
330*4882a593Smuzhiyun /* port not enabled */
331*4882a593Smuzhiyun if ((wriop_is_enabled_dpmac(i) != 1) ||
332*4882a593Smuzhiyun (wriop_get_phy_address(i) == -1))
333*4882a593Smuzhiyun continue;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun sprintf(ethname, "DPMAC%d@%s", i,
336*4882a593Smuzhiyun phy_interface_strings[wriop_get_enet_if(i)]);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun eth_dev = eth_get_dev_by_name(ethname);
339*4882a593Smuzhiyun if (eth_dev == NULL)
340*4882a593Smuzhiyun continue;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun switch (type) {
343*4882a593Smuzhiyun case MC_FIXUP_DPL:
344*4882a593Smuzhiyun err = mc_fixup_dpl_mac_addr(blob, i, eth_dev);
345*4882a593Smuzhiyun break;
346*4882a593Smuzhiyun case MC_FIXUP_DPC:
347*4882a593Smuzhiyun err = mc_fixup_dpc_mac_addr(blob, i, eth_dev);
348*4882a593Smuzhiyun break;
349*4882a593Smuzhiyun default:
350*4882a593Smuzhiyun break;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun if (err)
354*4882a593Smuzhiyun printf("fsl-mc: ERROR fixing mac address for %s\n",
355*4882a593Smuzhiyun ethname);
356*4882a593Smuzhiyun ret |= err;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun return ret;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
mc_fixup_dpc(u64 dpc_addr)362*4882a593Smuzhiyun static int mc_fixup_dpc(u64 dpc_addr)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun void *blob = (void *)dpc_addr;
365*4882a593Smuzhiyun int nodeoffset, err = 0;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun /* delete any existing ICID pools */
368*4882a593Smuzhiyun nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
369*4882a593Smuzhiyun if (fdt_del_node(blob, nodeoffset) < 0)
370*4882a593Smuzhiyun printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun /* add a new pool */
373*4882a593Smuzhiyun nodeoffset = fdt_path_offset(blob, "/resources");
374*4882a593Smuzhiyun if (nodeoffset < 0) {
375*4882a593Smuzhiyun printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
376*4882a593Smuzhiyun return -EINVAL;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
379*4882a593Smuzhiyun nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
380*4882a593Smuzhiyun do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
381*4882a593Smuzhiyun "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
382*4882a593Smuzhiyun do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
383*4882a593Smuzhiyun "num",
384*4882a593Smuzhiyun FSL_DPAA2_STREAM_ID_END -
385*4882a593Smuzhiyun FSL_DPAA2_STREAM_ID_START + 1, 1);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /* fixup MAC addresses for dpmac ports */
388*4882a593Smuzhiyun nodeoffset = fdt_path_offset(blob, "/board_info/ports");
389*4882a593Smuzhiyun if (nodeoffset < 0)
390*4882a593Smuzhiyun return 0;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
393*4882a593Smuzhiyun flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun return err;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
load_mc_dpc(u64 mc_ram_addr,size_t mc_ram_size,u64 mc_dpc_addr)398*4882a593Smuzhiyun static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun u64 mc_dpc_offset;
401*4882a593Smuzhiyun #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
402*4882a593Smuzhiyun int error;
403*4882a593Smuzhiyun void *dpc_fdt_hdr;
404*4882a593Smuzhiyun int dpc_size;
405*4882a593Smuzhiyun #endif
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
408*4882a593Smuzhiyun BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
409*4882a593Smuzhiyun CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
412*4882a593Smuzhiyun #else
413*4882a593Smuzhiyun #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
414*4882a593Smuzhiyun #endif
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun /*
417*4882a593Smuzhiyun * Load the MC DPC blob in the MC private DRAM block:
418*4882a593Smuzhiyun */
419*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
420*4882a593Smuzhiyun printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
421*4882a593Smuzhiyun #else
422*4882a593Smuzhiyun /*
423*4882a593Smuzhiyun * Get address and size of the DPC blob stored in flash:
424*4882a593Smuzhiyun */
425*4882a593Smuzhiyun dpc_fdt_hdr = (void *)mc_dpc_addr;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun error = fdt_check_header(dpc_fdt_hdr);
428*4882a593Smuzhiyun if (error != 0) {
429*4882a593Smuzhiyun /*
430*4882a593Smuzhiyun * Don't return with error here, since the MC firmware can
431*4882a593Smuzhiyun * still boot without a DPC
432*4882a593Smuzhiyun */
433*4882a593Smuzhiyun printf("\nfsl-mc: WARNING: No DPC image found");
434*4882a593Smuzhiyun return 0;
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun dpc_size = fdt_totalsize(dpc_fdt_hdr);
438*4882a593Smuzhiyun if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
439*4882a593Smuzhiyun printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
440*4882a593Smuzhiyun dpc_size);
441*4882a593Smuzhiyun return -EINVAL;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun mc_copy_image("MC DPC blob",
445*4882a593Smuzhiyun (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
446*4882a593Smuzhiyun #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
449*4882a593Smuzhiyun return -EINVAL;
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
452*4882a593Smuzhiyun return 0;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun
mc_fixup_dpl(u64 dpl_addr)456*4882a593Smuzhiyun static int mc_fixup_dpl(u64 dpl_addr)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun void *blob = (void *)dpl_addr;
459*4882a593Smuzhiyun u32 ver = fdt_getprop_u32_default(blob, "/", "dpl-version", 0);
460*4882a593Smuzhiyun int err = 0;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /* The DPL fixup for mac addresses is only relevant
463*4882a593Smuzhiyun * for old-style DPLs
464*4882a593Smuzhiyun */
465*4882a593Smuzhiyun if (ver >= 10)
466*4882a593Smuzhiyun return 0;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPL);
469*4882a593Smuzhiyun flush_dcache_range(dpl_addr, dpl_addr + fdt_totalsize(blob));
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun return err;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
load_mc_dpl(u64 mc_ram_addr,size_t mc_ram_size,u64 mc_dpl_addr)474*4882a593Smuzhiyun static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun u64 mc_dpl_offset;
477*4882a593Smuzhiyun #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
478*4882a593Smuzhiyun int error;
479*4882a593Smuzhiyun void *dpl_fdt_hdr;
480*4882a593Smuzhiyun int dpl_size;
481*4882a593Smuzhiyun #endif
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
484*4882a593Smuzhiyun BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
485*4882a593Smuzhiyun CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
488*4882a593Smuzhiyun #else
489*4882a593Smuzhiyun #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
490*4882a593Smuzhiyun #endif
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun /*
493*4882a593Smuzhiyun * Load the MC DPL blob in the MC private DRAM block:
494*4882a593Smuzhiyun */
495*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
496*4882a593Smuzhiyun printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
497*4882a593Smuzhiyun #else
498*4882a593Smuzhiyun /*
499*4882a593Smuzhiyun * Get address and size of the DPL blob stored in flash:
500*4882a593Smuzhiyun */
501*4882a593Smuzhiyun dpl_fdt_hdr = (void *)mc_dpl_addr;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun error = fdt_check_header(dpl_fdt_hdr);
504*4882a593Smuzhiyun if (error != 0) {
505*4882a593Smuzhiyun printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
506*4882a593Smuzhiyun return error;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun dpl_size = fdt_totalsize(dpl_fdt_hdr);
510*4882a593Smuzhiyun if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
511*4882a593Smuzhiyun printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
512*4882a593Smuzhiyun dpl_size);
513*4882a593Smuzhiyun return -EINVAL;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun mc_copy_image("MC DPL blob",
517*4882a593Smuzhiyun (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
518*4882a593Smuzhiyun #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun if (mc_fixup_dpl(mc_ram_addr + mc_dpl_offset))
521*4882a593Smuzhiyun return -EINVAL;
522*4882a593Smuzhiyun dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
523*4882a593Smuzhiyun return 0;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /**
527*4882a593Smuzhiyun * Return the MC boot timeout value in milliseconds
528*4882a593Smuzhiyun */
get_mc_boot_timeout_ms(void)529*4882a593Smuzhiyun static unsigned long get_mc_boot_timeout_ms(void)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun char *timeout_ms_env_var = env_get(MC_BOOT_TIMEOUT_ENV_VAR);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun if (timeout_ms_env_var) {
536*4882a593Smuzhiyun timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
537*4882a593Smuzhiyun if (timeout_ms == 0) {
538*4882a593Smuzhiyun printf("fsl-mc: WARNING: Invalid value for \'"
539*4882a593Smuzhiyun MC_BOOT_TIMEOUT_ENV_VAR
540*4882a593Smuzhiyun "\' environment variable: %lu\n",
541*4882a593Smuzhiyun timeout_ms);
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun return timeout_ms;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
551*4882a593Smuzhiyun
soc_has_aiop(void)552*4882a593Smuzhiyun __weak bool soc_has_aiop(void)
553*4882a593Smuzhiyun {
554*4882a593Smuzhiyun return false;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
load_mc_aiop_img(u64 aiop_fw_addr)557*4882a593Smuzhiyun static int load_mc_aiop_img(u64 aiop_fw_addr)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun u64 mc_ram_addr = mc_get_dram_addr();
560*4882a593Smuzhiyun #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
561*4882a593Smuzhiyun void *aiop_img;
562*4882a593Smuzhiyun #endif
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun /* Check if AIOP is available */
565*4882a593Smuzhiyun if (!soc_has_aiop())
566*4882a593Smuzhiyun return -ENODEV;
567*4882a593Smuzhiyun /*
568*4882a593Smuzhiyun * Load the MC AIOP image in the MC private DRAM block:
569*4882a593Smuzhiyun */
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
572*4882a593Smuzhiyun printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
573*4882a593Smuzhiyun CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
574*4882a593Smuzhiyun #else
575*4882a593Smuzhiyun aiop_img = (void *)aiop_fw_addr;
576*4882a593Smuzhiyun mc_copy_image("MC AIOP image",
577*4882a593Smuzhiyun (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
578*4882a593Smuzhiyun mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
579*4882a593Smuzhiyun #endif
580*4882a593Smuzhiyun mc_aiop_applied = 0;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun return 0;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun #endif
585*4882a593Smuzhiyun
wait_for_mc(bool booting_mc,u32 * final_reg_gsr)586*4882a593Smuzhiyun static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun u32 reg_gsr;
589*4882a593Smuzhiyun u32 mc_fw_boot_status;
590*4882a593Smuzhiyun unsigned long timeout_ms = get_mc_boot_timeout_ms();
591*4882a593Smuzhiyun struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun dmb();
594*4882a593Smuzhiyun assert(timeout_ms > 0);
595*4882a593Smuzhiyun for (;;) {
596*4882a593Smuzhiyun udelay(1000); /* throttle polling */
597*4882a593Smuzhiyun reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
598*4882a593Smuzhiyun mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
599*4882a593Smuzhiyun if (mc_fw_boot_status & 0x1)
600*4882a593Smuzhiyun break;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun timeout_ms--;
603*4882a593Smuzhiyun if (timeout_ms == 0)
604*4882a593Smuzhiyun break;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun if (timeout_ms == 0) {
608*4882a593Smuzhiyun printf("ERROR: timeout\n");
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun /* TODO: Get an error status from an MC CCSR register */
611*4882a593Smuzhiyun return -ETIMEDOUT;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun if (mc_fw_boot_status != 0x1) {
615*4882a593Smuzhiyun /*
616*4882a593Smuzhiyun * TODO: Identify critical errors from the GSR register's FS
617*4882a593Smuzhiyun * field and for those errors, set error to -ENODEV or other
618*4882a593Smuzhiyun * appropriate errno, so that the status property is set to
619*4882a593Smuzhiyun * failure in the fsl,dprc device tree node.
620*4882a593Smuzhiyun */
621*4882a593Smuzhiyun printf("WARNING: Firmware returned an error (GSR: %#x)\n",
622*4882a593Smuzhiyun reg_gsr);
623*4882a593Smuzhiyun } else {
624*4882a593Smuzhiyun printf("SUCCESS\n");
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun *final_reg_gsr = reg_gsr;
629*4882a593Smuzhiyun return 0;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
mc_init(u64 mc_fw_addr,u64 mc_dpc_addr)632*4882a593Smuzhiyun int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun int error = 0;
635*4882a593Smuzhiyun int portal_id = 0;
636*4882a593Smuzhiyun struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
637*4882a593Smuzhiyun u64 mc_ram_addr = mc_get_dram_addr();
638*4882a593Smuzhiyun u32 reg_gsr;
639*4882a593Smuzhiyun u32 reg_mcfbalr;
640*4882a593Smuzhiyun #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
641*4882a593Smuzhiyun const void *raw_image_addr;
642*4882a593Smuzhiyun size_t raw_image_size = 0;
643*4882a593Smuzhiyun #endif
644*4882a593Smuzhiyun struct mc_version mc_ver_info;
645*4882a593Smuzhiyun u8 mc_ram_num_256mb_blocks;
646*4882a593Smuzhiyun size_t mc_ram_size = mc_get_dram_block_size();
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
649*4882a593Smuzhiyun if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) {
650*4882a593Smuzhiyun error = -EINVAL;
651*4882a593Smuzhiyun printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
652*4882a593Smuzhiyun mc_ram_size);
653*4882a593Smuzhiyun goto out;
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun /*
657*4882a593Smuzhiyun * Management Complex cores should be held at reset out of POR.
658*4882a593Smuzhiyun * U-Boot should be the first software to touch MC. To be safe,
659*4882a593Smuzhiyun * we reset all cores again by setting GCR1 to 0. It doesn't do
660*4882a593Smuzhiyun * anything if they are held at reset. After we setup the firmware
661*4882a593Smuzhiyun * we kick off MC by deasserting the reset bit for core 0, and
662*4882a593Smuzhiyun * deasserting the reset bits for Command Portal Managers.
663*4882a593Smuzhiyun * The stop bits are not touched here. They are used to stop the
664*4882a593Smuzhiyun * cores when they are active. Setting stop bits doesn't stop the
665*4882a593Smuzhiyun * cores from fetching instructions when they are released from
666*4882a593Smuzhiyun * reset.
667*4882a593Smuzhiyun */
668*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_gcr1, 0);
669*4882a593Smuzhiyun dmb();
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
672*4882a593Smuzhiyun printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
673*4882a593Smuzhiyun #else
674*4882a593Smuzhiyun error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
675*4882a593Smuzhiyun &raw_image_size);
676*4882a593Smuzhiyun if (error != 0)
677*4882a593Smuzhiyun goto out;
678*4882a593Smuzhiyun /*
679*4882a593Smuzhiyun * Load the MC FW at the beginning of the MC private DRAM block:
680*4882a593Smuzhiyun */
681*4882a593Smuzhiyun mc_copy_image("MC Firmware",
682*4882a593Smuzhiyun (u64)raw_image_addr, raw_image_size, mc_ram_addr);
683*4882a593Smuzhiyun #endif
684*4882a593Smuzhiyun dump_ram_words("firmware", (void *)mc_ram_addr);
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
687*4882a593Smuzhiyun if (error != 0)
688*4882a593Smuzhiyun goto out;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
691*4882a593Smuzhiyun dump_mc_ccsr_regs(mc_ccsr_regs);
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun /*
694*4882a593Smuzhiyun * Tell MC what is the address range of the DRAM block assigned to it:
695*4882a593Smuzhiyun */
696*4882a593Smuzhiyun reg_mcfbalr = (u32)mc_ram_addr |
697*4882a593Smuzhiyun (mc_ram_num_256mb_blocks - 1);
698*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
699*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_mcfbahr,
700*4882a593Smuzhiyun (u32)(mc_ram_addr >> 32));
701*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun /*
704*4882a593Smuzhiyun * Tell the MC that we want delayed DPL deployment.
705*4882a593Smuzhiyun */
706*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun printf("\nfsl-mc: Booting Management Complex ... ");
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun /*
711*4882a593Smuzhiyun * Deassert reset and release MC core 0 to run
712*4882a593Smuzhiyun */
713*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
714*4882a593Smuzhiyun error = wait_for_mc(true, ®_gsr);
715*4882a593Smuzhiyun if (error != 0)
716*4882a593Smuzhiyun goto out;
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun /*
719*4882a593Smuzhiyun * TODO: need to obtain the portal_id for the root container from the
720*4882a593Smuzhiyun * DPL
721*4882a593Smuzhiyun */
722*4882a593Smuzhiyun portal_id = 0;
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun /*
725*4882a593Smuzhiyun * Initialize the global default MC portal
726*4882a593Smuzhiyun * And check that the MC firmware is responding portal commands:
727*4882a593Smuzhiyun */
728*4882a593Smuzhiyun root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
729*4882a593Smuzhiyun if (!root_mc_io) {
730*4882a593Smuzhiyun printf(" No memory: malloc() failed\n");
731*4882a593Smuzhiyun return -ENOMEM;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
735*4882a593Smuzhiyun debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
736*4882a593Smuzhiyun portal_id, root_mc_io->mmio_regs);
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
739*4882a593Smuzhiyun if (error != 0) {
740*4882a593Smuzhiyun printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
741*4882a593Smuzhiyun error);
742*4882a593Smuzhiyun goto out;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
746*4882a593Smuzhiyun mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
747*4882a593Smuzhiyun reg_gsr & GSR_FS_MASK);
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun out:
750*4882a593Smuzhiyun if (error != 0)
751*4882a593Smuzhiyun mc_boot_status = error;
752*4882a593Smuzhiyun else
753*4882a593Smuzhiyun mc_boot_status = 0;
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun return error;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun
mc_apply_dpl(u64 mc_dpl_addr)758*4882a593Smuzhiyun int mc_apply_dpl(u64 mc_dpl_addr)
759*4882a593Smuzhiyun {
760*4882a593Smuzhiyun struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
761*4882a593Smuzhiyun int error = 0;
762*4882a593Smuzhiyun u32 reg_gsr;
763*4882a593Smuzhiyun u64 mc_ram_addr = mc_get_dram_addr();
764*4882a593Smuzhiyun size_t mc_ram_size = mc_get_dram_block_size();
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun if (!mc_dpl_addr)
767*4882a593Smuzhiyun return -1;
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
770*4882a593Smuzhiyun if (error != 0)
771*4882a593Smuzhiyun return error;
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun /*
774*4882a593Smuzhiyun * Tell the MC to deploy the DPL:
775*4882a593Smuzhiyun */
776*4882a593Smuzhiyun out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
777*4882a593Smuzhiyun printf("fsl-mc: Deploying data path layout ... ");
778*4882a593Smuzhiyun error = wait_for_mc(false, ®_gsr);
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun if (!error)
781*4882a593Smuzhiyun mc_dpl_applied = 0;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun return error;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
get_mc_boot_status(void)786*4882a593Smuzhiyun int get_mc_boot_status(void)
787*4882a593Smuzhiyun {
788*4882a593Smuzhiyun return mc_boot_status;
789*4882a593Smuzhiyun }
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
get_aiop_apply_status(void)792*4882a593Smuzhiyun int get_aiop_apply_status(void)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun return mc_aiop_applied;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun #endif
797*4882a593Smuzhiyun
get_dpl_apply_status(void)798*4882a593Smuzhiyun int get_dpl_apply_status(void)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun return mc_dpl_applied;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun /**
804*4882a593Smuzhiyun * Return the MC address of private DRAM block.
805*4882a593Smuzhiyun */
mc_get_dram_addr(void)806*4882a593Smuzhiyun u64 mc_get_dram_addr(void)
807*4882a593Smuzhiyun {
808*4882a593Smuzhiyun return gd->arch.resv_ram;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun /**
812*4882a593Smuzhiyun * Return the actual size of the MC private DRAM block.
813*4882a593Smuzhiyun */
mc_get_dram_block_size(void)814*4882a593Smuzhiyun unsigned long mc_get_dram_block_size(void)
815*4882a593Smuzhiyun {
816*4882a593Smuzhiyun unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun char *dram_block_size_env_var = env_get(MC_MEM_SIZE_ENV_VAR);
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun if (dram_block_size_env_var) {
821*4882a593Smuzhiyun dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
822*4882a593Smuzhiyun 10);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
825*4882a593Smuzhiyun printf("fsl-mc: WARNING: Invalid value for \'"
826*4882a593Smuzhiyun MC_MEM_SIZE_ENV_VAR
827*4882a593Smuzhiyun "\' environment variable: %lu\n",
828*4882a593Smuzhiyun dram_block_size);
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun return dram_block_size;
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun
fsl_mc_ldpaa_init(bd_t * bis)837*4882a593Smuzhiyun int fsl_mc_ldpaa_init(bd_t *bis)
838*4882a593Smuzhiyun {
839*4882a593Smuzhiyun int i;
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
842*4882a593Smuzhiyun if ((wriop_is_enabled_dpmac(i) == 1) &&
843*4882a593Smuzhiyun (wriop_get_phy_address(i) != -1))
844*4882a593Smuzhiyun ldpaa_eth_init(i, wriop_get_enet_if(i));
845*4882a593Smuzhiyun return 0;
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun
dprc_version_check(struct fsl_mc_io * mc_io,uint16_t handle)848*4882a593Smuzhiyun static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
849*4882a593Smuzhiyun {
850*4882a593Smuzhiyun struct dprc_attributes attr;
851*4882a593Smuzhiyun int error;
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun memset(&attr, 0, sizeof(struct dprc_attributes));
854*4882a593Smuzhiyun error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr);
855*4882a593Smuzhiyun if (error == 0) {
856*4882a593Smuzhiyun if ((attr.version.major != DPRC_VER_MAJOR) ||
857*4882a593Smuzhiyun (attr.version.minor != DPRC_VER_MINOR)) {
858*4882a593Smuzhiyun printf("DPRC version mismatch found %u.%u,",
859*4882a593Smuzhiyun attr.version.major,
860*4882a593Smuzhiyun attr.version.minor);
861*4882a593Smuzhiyun printf("supported version is %u.%u\n",
862*4882a593Smuzhiyun DPRC_VER_MAJOR, DPRC_VER_MINOR);
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun return error;
866*4882a593Smuzhiyun }
867*4882a593Smuzhiyun
dpio_init(void)868*4882a593Smuzhiyun static int dpio_init(void)
869*4882a593Smuzhiyun {
870*4882a593Smuzhiyun struct qbman_swp_desc p_des;
871*4882a593Smuzhiyun struct dpio_attr attr;
872*4882a593Smuzhiyun struct dpio_cfg dpio_cfg;
873*4882a593Smuzhiyun int err = 0;
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
876*4882a593Smuzhiyun if (!dflt_dpio) {
877*4882a593Smuzhiyun printf("No memory: malloc() failed\n");
878*4882a593Smuzhiyun err = -ENOMEM;
879*4882a593Smuzhiyun goto err_malloc;
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
883*4882a593Smuzhiyun dpio_cfg.num_priorities = 8;
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
886*4882a593Smuzhiyun &dflt_dpio->dpio_handle);
887*4882a593Smuzhiyun if (err < 0) {
888*4882a593Smuzhiyun printf("dpio_create() failed: %d\n", err);
889*4882a593Smuzhiyun err = -ENODEV;
890*4882a593Smuzhiyun goto err_create;
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun memset(&attr, 0, sizeof(struct dpio_attr));
894*4882a593Smuzhiyun err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
895*4882a593Smuzhiyun dflt_dpio->dpio_handle, &attr);
896*4882a593Smuzhiyun if (err < 0) {
897*4882a593Smuzhiyun printf("dpio_get_attributes() failed: %d\n", err);
898*4882a593Smuzhiyun goto err_get_attr;
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun if ((attr.version.major != DPIO_VER_MAJOR) ||
902*4882a593Smuzhiyun (attr.version.minor != DPIO_VER_MINOR)) {
903*4882a593Smuzhiyun printf("DPIO version mismatch found %u.%u,",
904*4882a593Smuzhiyun attr.version.major, attr.version.minor);
905*4882a593Smuzhiyun printf("supported version is %u.%u\n",
906*4882a593Smuzhiyun DPIO_VER_MAJOR, DPIO_VER_MINOR);
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun dflt_dpio->dpio_id = attr.id;
910*4882a593Smuzhiyun #ifdef DEBUG
911*4882a593Smuzhiyun printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
912*4882a593Smuzhiyun #endif
913*4882a593Smuzhiyun err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
914*4882a593Smuzhiyun if (err < 0) {
915*4882a593Smuzhiyun printf("dpio_enable() failed %d\n", err);
916*4882a593Smuzhiyun goto err_get_enable;
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
919*4882a593Smuzhiyun attr.qbman_portal_ce_offset,
920*4882a593Smuzhiyun attr.qbman_portal_ci_offset,
921*4882a593Smuzhiyun attr.qbman_portal_id,
922*4882a593Smuzhiyun attr.num_priorities);
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
925*4882a593Smuzhiyun + attr.qbman_portal_ce_offset);
926*4882a593Smuzhiyun p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
927*4882a593Smuzhiyun + attr.qbman_portal_ci_offset);
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun dflt_dpio->sw_portal = qbman_swp_init(&p_des);
930*4882a593Smuzhiyun if (dflt_dpio->sw_portal == NULL) {
931*4882a593Smuzhiyun printf("qbman_swp_init() failed\n");
932*4882a593Smuzhiyun goto err_get_swp_init;
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun return 0;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun err_get_swp_init:
937*4882a593Smuzhiyun dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
938*4882a593Smuzhiyun err_get_enable:
939*4882a593Smuzhiyun err_get_attr:
940*4882a593Smuzhiyun dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
941*4882a593Smuzhiyun dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
942*4882a593Smuzhiyun err_create:
943*4882a593Smuzhiyun free(dflt_dpio);
944*4882a593Smuzhiyun err_malloc:
945*4882a593Smuzhiyun return err;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
dpio_exit(void)948*4882a593Smuzhiyun static int dpio_exit(void)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun int err;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
953*4882a593Smuzhiyun if (err < 0) {
954*4882a593Smuzhiyun printf("dpio_disable() failed: %d\n", err);
955*4882a593Smuzhiyun goto err;
956*4882a593Smuzhiyun }
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
959*4882a593Smuzhiyun if (err < 0) {
960*4882a593Smuzhiyun printf("dpio_destroy() failed: %d\n", err);
961*4882a593Smuzhiyun goto err;
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun #ifdef DEBUG
965*4882a593Smuzhiyun printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
966*4882a593Smuzhiyun #endif
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun if (dflt_dpio)
969*4882a593Smuzhiyun free(dflt_dpio);
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun return 0;
972*4882a593Smuzhiyun err:
973*4882a593Smuzhiyun return err;
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun
dprc_init(void)976*4882a593Smuzhiyun static int dprc_init(void)
977*4882a593Smuzhiyun {
978*4882a593Smuzhiyun int err, child_portal_id, container_id;
979*4882a593Smuzhiyun struct dprc_cfg cfg;
980*4882a593Smuzhiyun uint64_t mc_portal_offset;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun /* Open root container */
983*4882a593Smuzhiyun err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
984*4882a593Smuzhiyun if (err < 0) {
985*4882a593Smuzhiyun printf("dprc_get_container_id(): Root failed: %d\n", err);
986*4882a593Smuzhiyun goto err_root_container_id;
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun #ifdef DEBUG
990*4882a593Smuzhiyun printf("Root container id = %d\n", container_id);
991*4882a593Smuzhiyun #endif
992*4882a593Smuzhiyun err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
993*4882a593Smuzhiyun &root_dprc_handle);
994*4882a593Smuzhiyun if (err < 0) {
995*4882a593Smuzhiyun printf("dprc_open(): Root Container failed: %d\n", err);
996*4882a593Smuzhiyun goto err_root_open;
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun
999*4882a593Smuzhiyun if (!root_dprc_handle) {
1000*4882a593Smuzhiyun printf("dprc_open(): Root Container Handle is not valid\n");
1001*4882a593Smuzhiyun goto err_root_open;
1002*4882a593Smuzhiyun }
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun err = dprc_version_check(root_mc_io, root_dprc_handle);
1005*4882a593Smuzhiyun if (err < 0) {
1006*4882a593Smuzhiyun printf("dprc_version_check() failed: %d\n", err);
1007*4882a593Smuzhiyun goto err_root_open;
1008*4882a593Smuzhiyun }
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun memset(&cfg, 0, sizeof(struct dprc_cfg));
1011*4882a593Smuzhiyun cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
1012*4882a593Smuzhiyun DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
1013*4882a593Smuzhiyun DPRC_CFG_OPT_ALLOC_ALLOWED;
1014*4882a593Smuzhiyun cfg.icid = DPRC_GET_ICID_FROM_POOL;
1015*4882a593Smuzhiyun cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
1016*4882a593Smuzhiyun err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
1017*4882a593Smuzhiyun root_dprc_handle,
1018*4882a593Smuzhiyun &cfg,
1019*4882a593Smuzhiyun &child_dprc_id,
1020*4882a593Smuzhiyun &mc_portal_offset);
1021*4882a593Smuzhiyun if (err < 0) {
1022*4882a593Smuzhiyun printf("dprc_create_container() failed: %d\n", err);
1023*4882a593Smuzhiyun goto err_create;
1024*4882a593Smuzhiyun }
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
1027*4882a593Smuzhiyun if (!dflt_mc_io) {
1028*4882a593Smuzhiyun err = -ENOMEM;
1029*4882a593Smuzhiyun printf(" No memory: malloc() failed\n");
1030*4882a593Smuzhiyun goto err_malloc;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
1034*4882a593Smuzhiyun dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
1035*4882a593Smuzhiyun #ifdef DEBUG
1036*4882a593Smuzhiyun printf("MC portal of child DPRC container: %d, physical addr %p)\n",
1037*4882a593Smuzhiyun child_dprc_id, dflt_mc_io->mmio_regs);
1038*4882a593Smuzhiyun #endif
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
1041*4882a593Smuzhiyun &dflt_dprc_handle);
1042*4882a593Smuzhiyun if (err < 0) {
1043*4882a593Smuzhiyun printf("dprc_open(): Child container failed: %d\n", err);
1044*4882a593Smuzhiyun goto err_child_open;
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun if (!dflt_dprc_handle) {
1048*4882a593Smuzhiyun printf("dprc_open(): Child container Handle is not valid\n");
1049*4882a593Smuzhiyun goto err_child_open;
1050*4882a593Smuzhiyun }
1051*4882a593Smuzhiyun
1052*4882a593Smuzhiyun return 0;
1053*4882a593Smuzhiyun err_child_open:
1054*4882a593Smuzhiyun free(dflt_mc_io);
1055*4882a593Smuzhiyun err_malloc:
1056*4882a593Smuzhiyun dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
1057*4882a593Smuzhiyun root_dprc_handle, child_dprc_id);
1058*4882a593Smuzhiyun err_create:
1059*4882a593Smuzhiyun dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1060*4882a593Smuzhiyun err_root_open:
1061*4882a593Smuzhiyun err_root_container_id:
1062*4882a593Smuzhiyun return err;
1063*4882a593Smuzhiyun }
1064*4882a593Smuzhiyun
dprc_exit(void)1065*4882a593Smuzhiyun static int dprc_exit(void)
1066*4882a593Smuzhiyun {
1067*4882a593Smuzhiyun int err;
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
1070*4882a593Smuzhiyun if (err < 0) {
1071*4882a593Smuzhiyun printf("dprc_close(): Child failed: %d\n", err);
1072*4882a593Smuzhiyun goto err;
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
1076*4882a593Smuzhiyun root_dprc_handle, child_dprc_id);
1077*4882a593Smuzhiyun if (err < 0) {
1078*4882a593Smuzhiyun printf("dprc_destroy_container() failed: %d\n", err);
1079*4882a593Smuzhiyun goto err;
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1083*4882a593Smuzhiyun if (err < 0) {
1084*4882a593Smuzhiyun printf("dprc_close(): Root failed: %d\n", err);
1085*4882a593Smuzhiyun goto err;
1086*4882a593Smuzhiyun }
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun if (dflt_mc_io)
1089*4882a593Smuzhiyun free(dflt_mc_io);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun if (root_mc_io)
1092*4882a593Smuzhiyun free(root_mc_io);
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun return 0;
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun err:
1097*4882a593Smuzhiyun return err;
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun
dpbp_init(void)1100*4882a593Smuzhiyun static int dpbp_init(void)
1101*4882a593Smuzhiyun {
1102*4882a593Smuzhiyun int err;
1103*4882a593Smuzhiyun struct dpbp_attr dpbp_attr;
1104*4882a593Smuzhiyun struct dpbp_cfg dpbp_cfg;
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
1107*4882a593Smuzhiyun if (!dflt_dpbp) {
1108*4882a593Smuzhiyun printf("No memory: malloc() failed\n");
1109*4882a593Smuzhiyun err = -ENOMEM;
1110*4882a593Smuzhiyun goto err_malloc;
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun dpbp_cfg.options = 512;
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
1116*4882a593Smuzhiyun &dflt_dpbp->dpbp_handle);
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun if (err < 0) {
1119*4882a593Smuzhiyun err = -ENODEV;
1120*4882a593Smuzhiyun printf("dpbp_create() failed: %d\n", err);
1121*4882a593Smuzhiyun goto err_create;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
1125*4882a593Smuzhiyun err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1126*4882a593Smuzhiyun dflt_dpbp->dpbp_handle,
1127*4882a593Smuzhiyun &dpbp_attr);
1128*4882a593Smuzhiyun if (err < 0) {
1129*4882a593Smuzhiyun printf("dpbp_get_attributes() failed: %d\n", err);
1130*4882a593Smuzhiyun goto err_get_attr;
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun if ((dpbp_attr.version.major != DPBP_VER_MAJOR) ||
1134*4882a593Smuzhiyun (dpbp_attr.version.minor != DPBP_VER_MINOR)) {
1135*4882a593Smuzhiyun printf("DPBP version mismatch found %u.%u,",
1136*4882a593Smuzhiyun dpbp_attr.version.major, dpbp_attr.version.minor);
1137*4882a593Smuzhiyun printf("supported version is %u.%u\n",
1138*4882a593Smuzhiyun DPBP_VER_MAJOR, DPBP_VER_MINOR);
1139*4882a593Smuzhiyun }
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
1142*4882a593Smuzhiyun #ifdef DEBUG
1143*4882a593Smuzhiyun printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
1144*4882a593Smuzhiyun #endif
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1147*4882a593Smuzhiyun if (err < 0) {
1148*4882a593Smuzhiyun printf("dpbp_close() failed: %d\n", err);
1149*4882a593Smuzhiyun goto err_close;
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun
1152*4882a593Smuzhiyun return 0;
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun err_close:
1155*4882a593Smuzhiyun free(dflt_dpbp);
1156*4882a593Smuzhiyun err_get_attr:
1157*4882a593Smuzhiyun dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1158*4882a593Smuzhiyun dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1159*4882a593Smuzhiyun err_create:
1160*4882a593Smuzhiyun err_malloc:
1161*4882a593Smuzhiyun return err;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun
dpbp_exit(void)1164*4882a593Smuzhiyun static int dpbp_exit(void)
1165*4882a593Smuzhiyun {
1166*4882a593Smuzhiyun int err;
1167*4882a593Smuzhiyun
1168*4882a593Smuzhiyun err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
1169*4882a593Smuzhiyun &dflt_dpbp->dpbp_handle);
1170*4882a593Smuzhiyun if (err < 0) {
1171*4882a593Smuzhiyun printf("dpbp_open() failed: %d\n", err);
1172*4882a593Smuzhiyun goto err;
1173*4882a593Smuzhiyun }
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
1176*4882a593Smuzhiyun dflt_dpbp->dpbp_handle);
1177*4882a593Smuzhiyun if (err < 0) {
1178*4882a593Smuzhiyun printf("dpbp_destroy() failed: %d\n", err);
1179*4882a593Smuzhiyun goto err;
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun #ifdef DEBUG
1183*4882a593Smuzhiyun printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
1184*4882a593Smuzhiyun #endif
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun if (dflt_dpbp)
1187*4882a593Smuzhiyun free(dflt_dpbp);
1188*4882a593Smuzhiyun return 0;
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun err:
1191*4882a593Smuzhiyun return err;
1192*4882a593Smuzhiyun }
1193*4882a593Smuzhiyun
dpni_init(void)1194*4882a593Smuzhiyun static int dpni_init(void)
1195*4882a593Smuzhiyun {
1196*4882a593Smuzhiyun int err;
1197*4882a593Smuzhiyun struct dpni_attr dpni_attr;
1198*4882a593Smuzhiyun uint8_t ext_cfg_buf[256] = {0};
1199*4882a593Smuzhiyun struct dpni_extended_cfg dpni_extended_cfg;
1200*4882a593Smuzhiyun struct dpni_cfg dpni_cfg;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
1203*4882a593Smuzhiyun if (!dflt_dpni) {
1204*4882a593Smuzhiyun printf("No memory: malloc() failed\n");
1205*4882a593Smuzhiyun err = -ENOMEM;
1206*4882a593Smuzhiyun goto err_malloc;
1207*4882a593Smuzhiyun }
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg));
1210*4882a593Smuzhiyun err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]);
1211*4882a593Smuzhiyun if (err < 0) {
1212*4882a593Smuzhiyun err = -ENODEV;
1213*4882a593Smuzhiyun printf("dpni_prepare_extended_cfg() failed: %d\n", err);
1214*4882a593Smuzhiyun goto err_prepare_extended_cfg;
1215*4882a593Smuzhiyun }
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun memset(&dpni_cfg, 0, sizeof(dpni_cfg));
1218*4882a593Smuzhiyun dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
1219*4882a593Smuzhiyun DPNI_OPT_MULTICAST_FILTER;
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0];
1222*4882a593Smuzhiyun err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
1223*4882a593Smuzhiyun &dflt_dpni->dpni_handle);
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun if (err < 0) {
1226*4882a593Smuzhiyun err = -ENODEV;
1227*4882a593Smuzhiyun printf("dpni_create() failed: %d\n", err);
1228*4882a593Smuzhiyun goto err_create;
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun
1231*4882a593Smuzhiyun memset(&dpni_attr, 0, sizeof(struct dpni_attr));
1232*4882a593Smuzhiyun err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1233*4882a593Smuzhiyun dflt_dpni->dpni_handle,
1234*4882a593Smuzhiyun &dpni_attr);
1235*4882a593Smuzhiyun if (err < 0) {
1236*4882a593Smuzhiyun printf("dpni_get_attributes() failed: %d\n", err);
1237*4882a593Smuzhiyun goto err_get_attr;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun if ((dpni_attr.version.major != DPNI_VER_MAJOR) ||
1241*4882a593Smuzhiyun (dpni_attr.version.minor != DPNI_VER_MINOR)) {
1242*4882a593Smuzhiyun printf("DPNI version mismatch found %u.%u,",
1243*4882a593Smuzhiyun dpni_attr.version.major, dpni_attr.version.minor);
1244*4882a593Smuzhiyun printf("supported version is %u.%u\n",
1245*4882a593Smuzhiyun DPNI_VER_MAJOR, DPNI_VER_MINOR);
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun dflt_dpni->dpni_id = dpni_attr.id;
1249*4882a593Smuzhiyun #ifdef DEBUG
1250*4882a593Smuzhiyun printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
1251*4882a593Smuzhiyun #endif
1252*4882a593Smuzhiyun
1253*4882a593Smuzhiyun err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1254*4882a593Smuzhiyun if (err < 0) {
1255*4882a593Smuzhiyun printf("dpni_close() failed: %d\n", err);
1256*4882a593Smuzhiyun goto err_close;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun return 0;
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun err_close:
1262*4882a593Smuzhiyun err_get_attr:
1263*4882a593Smuzhiyun dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1264*4882a593Smuzhiyun dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1265*4882a593Smuzhiyun err_create:
1266*4882a593Smuzhiyun err_prepare_extended_cfg:
1267*4882a593Smuzhiyun free(dflt_dpni);
1268*4882a593Smuzhiyun err_malloc:
1269*4882a593Smuzhiyun return err;
1270*4882a593Smuzhiyun }
1271*4882a593Smuzhiyun
dpni_exit(void)1272*4882a593Smuzhiyun static int dpni_exit(void)
1273*4882a593Smuzhiyun {
1274*4882a593Smuzhiyun int err;
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
1277*4882a593Smuzhiyun &dflt_dpni->dpni_handle);
1278*4882a593Smuzhiyun if (err < 0) {
1279*4882a593Smuzhiyun printf("dpni_open() failed: %d\n", err);
1280*4882a593Smuzhiyun goto err;
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
1284*4882a593Smuzhiyun dflt_dpni->dpni_handle);
1285*4882a593Smuzhiyun if (err < 0) {
1286*4882a593Smuzhiyun printf("dpni_destroy() failed: %d\n", err);
1287*4882a593Smuzhiyun goto err;
1288*4882a593Smuzhiyun }
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun #ifdef DEBUG
1291*4882a593Smuzhiyun printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
1292*4882a593Smuzhiyun #endif
1293*4882a593Smuzhiyun
1294*4882a593Smuzhiyun if (dflt_dpni)
1295*4882a593Smuzhiyun free(dflt_dpni);
1296*4882a593Smuzhiyun return 0;
1297*4882a593Smuzhiyun
1298*4882a593Smuzhiyun err:
1299*4882a593Smuzhiyun return err;
1300*4882a593Smuzhiyun }
1301*4882a593Smuzhiyun
mc_init_object(void)1302*4882a593Smuzhiyun static int mc_init_object(void)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun int err = 0;
1305*4882a593Smuzhiyun
1306*4882a593Smuzhiyun err = dprc_init();
1307*4882a593Smuzhiyun if (err < 0) {
1308*4882a593Smuzhiyun printf("dprc_init() failed: %d\n", err);
1309*4882a593Smuzhiyun goto err;
1310*4882a593Smuzhiyun }
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun err = dpbp_init();
1313*4882a593Smuzhiyun if (err < 0) {
1314*4882a593Smuzhiyun printf("dpbp_init() failed: %d\n", err);
1315*4882a593Smuzhiyun goto err;
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun err = dpio_init();
1319*4882a593Smuzhiyun if (err < 0) {
1320*4882a593Smuzhiyun printf("dpio_init() failed: %d\n", err);
1321*4882a593Smuzhiyun goto err;
1322*4882a593Smuzhiyun }
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun err = dpni_init();
1325*4882a593Smuzhiyun if (err < 0) {
1326*4882a593Smuzhiyun printf("dpni_init() failed: %d\n", err);
1327*4882a593Smuzhiyun goto err;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun return 0;
1331*4882a593Smuzhiyun err:
1332*4882a593Smuzhiyun return err;
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun
fsl_mc_ldpaa_exit(bd_t * bd)1335*4882a593Smuzhiyun int fsl_mc_ldpaa_exit(bd_t *bd)
1336*4882a593Smuzhiyun {
1337*4882a593Smuzhiyun int err = 0;
1338*4882a593Smuzhiyun bool is_dpl_apply_status = false;
1339*4882a593Smuzhiyun bool mc_boot_status = false;
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
1342*4882a593Smuzhiyun mc_apply_dpl(mc_lazy_dpl_addr);
1343*4882a593Smuzhiyun mc_lazy_dpl_addr = 0;
1344*4882a593Smuzhiyun }
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun if (!get_mc_boot_status())
1347*4882a593Smuzhiyun mc_boot_status = true;
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun /* MC is not loaded intentionally, So return success. */
1350*4882a593Smuzhiyun if (bd && !mc_boot_status)
1351*4882a593Smuzhiyun return 0;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun /* If DPL is deployed, set is_dpl_apply_status as TRUE. */
1354*4882a593Smuzhiyun if (!get_dpl_apply_status())
1355*4882a593Smuzhiyun is_dpl_apply_status = true;
1356*4882a593Smuzhiyun
1357*4882a593Smuzhiyun /*
1358*4882a593Smuzhiyun * For case MC is loaded but DPL is not deployed, return success and
1359*4882a593Smuzhiyun * print message on console. Else FDT fix-up code execution hanged.
1360*4882a593Smuzhiyun */
1361*4882a593Smuzhiyun if (bd && mc_boot_status && !is_dpl_apply_status) {
1362*4882a593Smuzhiyun printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
1363*4882a593Smuzhiyun return 0;
1364*4882a593Smuzhiyun }
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun if (bd && mc_boot_status && is_dpl_apply_status)
1367*4882a593Smuzhiyun return 0;
1368*4882a593Smuzhiyun
1369*4882a593Smuzhiyun err = dpbp_exit();
1370*4882a593Smuzhiyun if (err < 0) {
1371*4882a593Smuzhiyun printf("dpbp_exit() failed: %d\n", err);
1372*4882a593Smuzhiyun goto err;
1373*4882a593Smuzhiyun }
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun err = dpio_exit();
1376*4882a593Smuzhiyun if (err < 0) {
1377*4882a593Smuzhiyun printf("dpio_exit() failed: %d\n", err);
1378*4882a593Smuzhiyun goto err;
1379*4882a593Smuzhiyun }
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun err = dpni_exit();
1382*4882a593Smuzhiyun if (err < 0) {
1383*4882a593Smuzhiyun printf("dpni_exit() failed: %d\n", err);
1384*4882a593Smuzhiyun goto err;
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun err = dprc_exit();
1388*4882a593Smuzhiyun if (err < 0) {
1389*4882a593Smuzhiyun printf("dprc_exit() failed: %d\n", err);
1390*4882a593Smuzhiyun goto err;
1391*4882a593Smuzhiyun }
1392*4882a593Smuzhiyun
1393*4882a593Smuzhiyun return 0;
1394*4882a593Smuzhiyun err:
1395*4882a593Smuzhiyun return err;
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun
do_fsl_mc(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])1398*4882a593Smuzhiyun static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
1399*4882a593Smuzhiyun {
1400*4882a593Smuzhiyun int err = 0;
1401*4882a593Smuzhiyun if (argc < 3)
1402*4882a593Smuzhiyun goto usage;
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun switch (argv[1][0]) {
1405*4882a593Smuzhiyun case 's': {
1406*4882a593Smuzhiyun char sub_cmd;
1407*4882a593Smuzhiyun u64 mc_fw_addr, mc_dpc_addr;
1408*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1409*4882a593Smuzhiyun u64 aiop_fw_addr;
1410*4882a593Smuzhiyun #endif
1411*4882a593Smuzhiyun
1412*4882a593Smuzhiyun sub_cmd = argv[2][0];
1413*4882a593Smuzhiyun switch (sub_cmd) {
1414*4882a593Smuzhiyun case 'm':
1415*4882a593Smuzhiyun if (argc < 5)
1416*4882a593Smuzhiyun goto usage;
1417*4882a593Smuzhiyun
1418*4882a593Smuzhiyun if (get_mc_boot_status() == 0) {
1419*4882a593Smuzhiyun printf("fsl-mc: MC is already booted");
1420*4882a593Smuzhiyun printf("\n");
1421*4882a593Smuzhiyun return err;
1422*4882a593Smuzhiyun }
1423*4882a593Smuzhiyun mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
1424*4882a593Smuzhiyun mc_dpc_addr = simple_strtoull(argv[4], NULL,
1425*4882a593Smuzhiyun 16);
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun if (!mc_init(mc_fw_addr, mc_dpc_addr))
1428*4882a593Smuzhiyun err = mc_init_object();
1429*4882a593Smuzhiyun break;
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1432*4882a593Smuzhiyun case 'a':
1433*4882a593Smuzhiyun if (argc < 4)
1434*4882a593Smuzhiyun goto usage;
1435*4882a593Smuzhiyun if (get_aiop_apply_status() == 0) {
1436*4882a593Smuzhiyun printf("fsl-mc: AIOP FW is already");
1437*4882a593Smuzhiyun printf(" applied\n");
1438*4882a593Smuzhiyun return err;
1439*4882a593Smuzhiyun }
1440*4882a593Smuzhiyun
1441*4882a593Smuzhiyun aiop_fw_addr = simple_strtoull(argv[3], NULL,
1442*4882a593Smuzhiyun 16);
1443*4882a593Smuzhiyun
1444*4882a593Smuzhiyun /* if SoC doesn't have AIOP, err = -ENODEV */
1445*4882a593Smuzhiyun err = load_mc_aiop_img(aiop_fw_addr);
1446*4882a593Smuzhiyun if (!err)
1447*4882a593Smuzhiyun printf("fsl-mc: AIOP FW applied\n");
1448*4882a593Smuzhiyun break;
1449*4882a593Smuzhiyun #endif
1450*4882a593Smuzhiyun default:
1451*4882a593Smuzhiyun printf("Invalid option: %s\n", argv[2]);
1452*4882a593Smuzhiyun goto usage;
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun break;
1455*4882a593Smuzhiyun }
1456*4882a593Smuzhiyun }
1457*4882a593Smuzhiyun break;
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun case 'l':
1460*4882a593Smuzhiyun case 'a': {
1461*4882a593Smuzhiyun u64 mc_dpl_addr;
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun if (argc < 4)
1464*4882a593Smuzhiyun goto usage;
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun if (get_dpl_apply_status() == 0) {
1467*4882a593Smuzhiyun printf("fsl-mc: DPL already applied\n");
1468*4882a593Smuzhiyun return err;
1469*4882a593Smuzhiyun }
1470*4882a593Smuzhiyun
1471*4882a593Smuzhiyun mc_dpl_addr = simple_strtoull(argv[3], NULL,
1472*4882a593Smuzhiyun 16);
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun if (get_mc_boot_status() != 0) {
1475*4882a593Smuzhiyun printf("fsl-mc: Deploying data path layout ..");
1476*4882a593Smuzhiyun printf("ERROR (MC is not booted)\n");
1477*4882a593Smuzhiyun return -ENODEV;
1478*4882a593Smuzhiyun }
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun if (argv[1][0] == 'l') {
1481*4882a593Smuzhiyun /*
1482*4882a593Smuzhiyun * We will do the actual dpaa exit and dpl apply
1483*4882a593Smuzhiyun * later from announce_and_cleanup().
1484*4882a593Smuzhiyun */
1485*4882a593Smuzhiyun mc_lazy_dpl_addr = mc_dpl_addr;
1486*4882a593Smuzhiyun } else {
1487*4882a593Smuzhiyun /* The user wants it applied now */
1488*4882a593Smuzhiyun if (!fsl_mc_ldpaa_exit(NULL))
1489*4882a593Smuzhiyun err = mc_apply_dpl(mc_dpl_addr);
1490*4882a593Smuzhiyun }
1491*4882a593Smuzhiyun break;
1492*4882a593Smuzhiyun }
1493*4882a593Smuzhiyun default:
1494*4882a593Smuzhiyun printf("Invalid option: %s\n", argv[1]);
1495*4882a593Smuzhiyun goto usage;
1496*4882a593Smuzhiyun break;
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun return err;
1499*4882a593Smuzhiyun usage:
1500*4882a593Smuzhiyun return CMD_RET_USAGE;
1501*4882a593Smuzhiyun }
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun U_BOOT_CMD(
1504*4882a593Smuzhiyun fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
1505*4882a593Smuzhiyun "DPAA2 command to manage Management Complex (MC)",
1506*4882a593Smuzhiyun "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
1507*4882a593Smuzhiyun "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
1508*4882a593Smuzhiyun "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
1509*4882a593Smuzhiyun "fsl_mc start aiop [FW_addr] - Start AIOP\n"
1510*4882a593Smuzhiyun );
1511*4882a593Smuzhiyun
mc_env_boot(void)1512*4882a593Smuzhiyun void mc_env_boot(void)
1513*4882a593Smuzhiyun {
1514*4882a593Smuzhiyun #if defined(CONFIG_FSL_MC_ENET)
1515*4882a593Smuzhiyun char *mc_boot_env_var;
1516*4882a593Smuzhiyun /* The MC may only be initialized in the reset PHY function
1517*4882a593Smuzhiyun * because otherwise U-Boot has not yet set up all the MAC
1518*4882a593Smuzhiyun * address info properly. Without MAC addresses, the MC code
1519*4882a593Smuzhiyun * can not properly initialize the DPC.
1520*4882a593Smuzhiyun */
1521*4882a593Smuzhiyun mc_boot_env_var = env_get(MC_BOOT_ENV_VAR);
1522*4882a593Smuzhiyun if (mc_boot_env_var)
1523*4882a593Smuzhiyun run_command_list(mc_boot_env_var, -1, 0);
1524*4882a593Smuzhiyun #endif /* CONFIG_FSL_MC_ENET */
1525*4882a593Smuzhiyun }
1526