1*4882a593Smuzhiyun /* Copyright 2013-2015 Freescale Semiconductor Inc. 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __FSL_DPMNG_CMD_H 6*4882a593Smuzhiyun #define __FSL_DPMNG_CMD_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* Command IDs */ 9*4882a593Smuzhiyun #define DPMNG_CMDID_GET_VERSION 0x831 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* cmd, param, offset, width, type, arg_name */ 12*4882a593Smuzhiyun #define DPMNG_RSP_GET_VERSION(cmd, mc_ver_info) \ 13*4882a593Smuzhiyun do { \ 14*4882a593Smuzhiyun MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mc_ver_info->revision); \ 15*4882a593Smuzhiyun MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_ver_info->major); \ 16*4882a593Smuzhiyun MC_RSP_OP(cmd, 1, 0, 32, uint32_t, mc_ver_info->minor); \ 17*4882a593Smuzhiyun } while (0) 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #endif /* __FSL_DPMNG_CMD_H */ 20