1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2009-2011 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * Dave Liu <daveliu@freescale.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /* MAXFRM - maximum frame length */
9*4882a593Smuzhiyun #define MAXFRM_MASK 0x0000ffff
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <phy.h>
13*4882a593Smuzhiyun #include <asm/types.h>
14*4882a593Smuzhiyun #include <asm/io.h>
15*4882a593Smuzhiyun #include <fsl_tgec.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "fm.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define TGEC_CMD_CFG_INIT (TGEC_CMD_CFG_NO_LEN_CHK | \
20*4882a593Smuzhiyun TGEC_CMD_CFG_RX_ER_DISC | \
21*4882a593Smuzhiyun TGEC_CMD_CFG_STAT_CLR | \
22*4882a593Smuzhiyun TGEC_CMD_CFG_PAUSE_IGNORE | \
23*4882a593Smuzhiyun TGEC_CMD_CFG_CRC_FWD)
24*4882a593Smuzhiyun #define TGEC_CMD_CFG_FINAL (TGEC_CMD_CFG_NO_LEN_CHK | \
25*4882a593Smuzhiyun TGEC_CMD_CFG_RX_ER_DISC | \
26*4882a593Smuzhiyun TGEC_CMD_CFG_PAUSE_IGNORE | \
27*4882a593Smuzhiyun TGEC_CMD_CFG_CRC_FWD)
28*4882a593Smuzhiyun
tgec_init_mac(struct fsl_enet_mac * mac)29*4882a593Smuzhiyun static void tgec_init_mac(struct fsl_enet_mac *mac)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct tgec *regs = mac->base;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* mask all interrupt */
34*4882a593Smuzhiyun out_be32(®s->imask, IMASK_MASK_ALL);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /* clear all events */
37*4882a593Smuzhiyun out_be32(®s->ievent, IEVENT_CLEAR_ALL);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* set the max receive length */
40*4882a593Smuzhiyun out_be32(®s->maxfrm, mac->max_rx_len & MAXFRM_MASK);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun * 1588 disable, insert second mac disable payload length check
44*4882a593Smuzhiyun * disable, normal operation, any rx error frame is discarded, clear
45*4882a593Smuzhiyun * counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no
46*4882a593Smuzhiyun * strip, Tx CRC append, Rx disable and Tx disable
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun out_be32(®s->command_config, TGEC_CMD_CFG_INIT);
49*4882a593Smuzhiyun udelay(1000);
50*4882a593Smuzhiyun out_be32(®s->command_config, TGEC_CMD_CFG_FINAL);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* multicast frame reception for the hash entry disable */
53*4882a593Smuzhiyun out_be32(®s->hashtable_ctrl, 0);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
tgec_enable_mac(struct fsl_enet_mac * mac)56*4882a593Smuzhiyun static void tgec_enable_mac(struct fsl_enet_mac *mac)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun struct tgec *regs = mac->base;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun setbits_be32(®s->command_config, TGEC_CMD_CFG_RXTX_EN);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
tgec_disable_mac(struct fsl_enet_mac * mac)63*4882a593Smuzhiyun static void tgec_disable_mac(struct fsl_enet_mac *mac)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct tgec *regs = mac->base;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun clrbits_be32(®s->command_config, TGEC_CMD_CFG_RXTX_EN);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
tgec_set_mac_addr(struct fsl_enet_mac * mac,u8 * mac_addr)70*4882a593Smuzhiyun static void tgec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct tgec *regs = mac->base;
73*4882a593Smuzhiyun u32 mac_addr0, mac_addr1;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /*
76*4882a593Smuzhiyun * if a station address of 0x12345678ABCD, perform a write to
77*4882a593Smuzhiyun * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
80*4882a593Smuzhiyun (mac_addr[1] << 8) | (mac_addr[0]);
81*4882a593Smuzhiyun out_be32(®s->mac_addr_0, mac_addr0);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
84*4882a593Smuzhiyun out_be32(®s->mac_addr_1, mac_addr1);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
tgec_set_interface_mode(struct fsl_enet_mac * mac,phy_interface_t type,int speed)87*4882a593Smuzhiyun static void tgec_set_interface_mode(struct fsl_enet_mac *mac,
88*4882a593Smuzhiyun phy_interface_t type, int speed)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun /* nothing right now */
91*4882a593Smuzhiyun return;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
init_tgec(struct fsl_enet_mac * mac,void * base,void * phyregs,int max_rx_len)94*4882a593Smuzhiyun void init_tgec(struct fsl_enet_mac *mac, void *base,
95*4882a593Smuzhiyun void *phyregs, int max_rx_len)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun mac->base = base;
98*4882a593Smuzhiyun mac->phyregs = phyregs;
99*4882a593Smuzhiyun mac->max_rx_len = max_rx_len;
100*4882a593Smuzhiyun mac->init_mac = tgec_init_mac;
101*4882a593Smuzhiyun mac->enable_mac = tgec_enable_mac;
102*4882a593Smuzhiyun mac->disable_mac = tgec_disable_mac;
103*4882a593Smuzhiyun mac->set_mac_addr = tgec_set_mac_addr;
104*4882a593Smuzhiyun mac->set_if_mode = tgec_set_interface_mode;
105*4882a593Smuzhiyun }
106