1*4882a593Smuzhiyunsource "drivers/net/phy/Kconfig" 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig DM_ETH 4*4882a593Smuzhiyun bool "Enable Driver Model for Ethernet drivers" 5*4882a593Smuzhiyun depends on DM 6*4882a593Smuzhiyun help 7*4882a593Smuzhiyun Enable driver model for Ethernet. 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun The eth_*() interface will be implemented by the UC_ETH class 10*4882a593Smuzhiyun This is currently implemented in net/eth.c 11*4882a593Smuzhiyun Look in include/net.h for details. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunconfig DM_MDIO 14*4882a593Smuzhiyun bool "Enable Driver Model for MDIO devices" 15*4882a593Smuzhiyun depends on DM_ETH && PHYLIB 16*4882a593Smuzhiyun help 17*4882a593Smuzhiyun Enable driver model for MDIO devices 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as 20*4882a593Smuzhiyun stand-alone devices. Useful in particular for systems that support 21*4882a593Smuzhiyun DM_ETH and have a stand-alone MDIO hardware block shared by multiple 22*4882a593Smuzhiyun Ethernet interfaces. 23*4882a593Smuzhiyun This is currently implemented in net/mdio-uclass.c 24*4882a593Smuzhiyun Look in include/miiphy.h for details. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyunconfig DM_ETH_PHY 27*4882a593Smuzhiyun bool "Enable Driver Model for Ethernet Generic PHY drivers" 28*4882a593Smuzhiyun depends on DM 29*4882a593Smuzhiyun help 30*4882a593Smuzhiyun Enable driver model for Ethernet Generic PHY . 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunmenuconfig NETDEVICES 33*4882a593Smuzhiyun bool "Network device support" 34*4882a593Smuzhiyun depends on NET 35*4882a593Smuzhiyun default y if DM_ETH 36*4882a593Smuzhiyun help 37*4882a593Smuzhiyun You must select Y to enable any network device support 38*4882a593Smuzhiyun Generally if you have any networking support this is a given 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun If unsure, say Y 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunif NETDEVICES 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunconfig PHY_GIGE 45*4882a593Smuzhiyun bool "Enable GbE PHY status parsing and configuration" 46*4882a593Smuzhiyun help 47*4882a593Smuzhiyun Enables support for parsing the status output and for 48*4882a593Smuzhiyun configuring GbE PHYs (affects the inner workings of some 49*4882a593Smuzhiyun commands and miiphyutil.c). 50*4882a593Smuzhiyun 51*4882a593Smuzhiyunconfig AG7XXX 52*4882a593Smuzhiyun bool "Atheros AG7xxx Ethernet MAC support" 53*4882a593Smuzhiyun depends on DM_ETH && ARCH_ATH79 54*4882a593Smuzhiyun select PHYLIB 55*4882a593Smuzhiyun help 56*4882a593Smuzhiyun This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is 57*4882a593Smuzhiyun present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun 60*4882a593Smuzhiyunconfig ALTERA_TSE 61*4882a593Smuzhiyun bool "Altera Triple-Speed Ethernet MAC support" 62*4882a593Smuzhiyun depends on DM_ETH 63*4882a593Smuzhiyun select PHYLIB 64*4882a593Smuzhiyun help 65*4882a593Smuzhiyun This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 66*4882a593Smuzhiyun Please find details on the "Triple-Speed Ethernet MegaCore Function 67*4882a593Smuzhiyun Resource Center" of Altera. 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunconfig BCM_SF2_ETH 70*4882a593Smuzhiyun bool "Broadcom SF2 (Starfighter2) Ethernet support" 71*4882a593Smuzhiyun select PHYLIB 72*4882a593Smuzhiyun help 73*4882a593Smuzhiyun This is an abstract framework which provides a generic interface 74*4882a593Smuzhiyun to MAC and DMA management for multiple Broadcom SoCs such as 75*4882a593Smuzhiyun Cygnus, NSP and bcm28155_ap platforms. 76*4882a593Smuzhiyun 77*4882a593Smuzhiyunconfig BCM_SF2_ETH_DEFAULT_PORT 78*4882a593Smuzhiyun int "Broadcom SF2 (Starfighter2) Ethernet default port number" 79*4882a593Smuzhiyun depends on BCM_SF2_ETH 80*4882a593Smuzhiyun default 0 81*4882a593Smuzhiyun help 82*4882a593Smuzhiyun Default port number for the Starfighter2 ethernet driver. 83*4882a593Smuzhiyun 84*4882a593Smuzhiyunconfig BCM_SF2_ETH_GMAC 85*4882a593Smuzhiyun bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" 86*4882a593Smuzhiyun depends on BCM_SF2_ETH 87*4882a593Smuzhiyun help 88*4882a593Smuzhiyun This flag enables the ethernet support for Broadcom platforms with 89*4882a593Smuzhiyun GMAC such as Cygnus. This driver is based on the framework provided 90*4882a593Smuzhiyun by the BCM_SF2_ETH driver. 91*4882a593Smuzhiyun Say Y to any bcmcygnus based platforms. 92*4882a593Smuzhiyun 93*4882a593Smuzhiyunconfig DWC_ETH_QOS 94*4882a593Smuzhiyun bool "Synopsys DWC Ethernet QOS device support" 95*4882a593Smuzhiyun depends on DM_ETH 96*4882a593Smuzhiyun select PHYLIB 97*4882a593Smuzhiyun help 98*4882a593Smuzhiyun This driver supports the Synopsys Designware Ethernet QOS (Quality 99*4882a593Smuzhiyun Of Service) IP block. The IP supports many options for bus type, 100*4882a593Smuzhiyun clocking/reset structure, and feature list. This driver currently 101*4882a593Smuzhiyun supports the specific configuration used in NVIDIA's Tegra186 chip, 102*4882a593Smuzhiyun but should be extensible to other combinations quite easily. 103*4882a593Smuzhiyun 104*4882a593Smuzhiyunconfig DWC_ETH_QOS_FULL 105*4882a593Smuzhiyun bool "Synopsys DWC Ethernet QOS full vendor support" 106*4882a593Smuzhiyun depends on DWC_ETH_QOS 107*4882a593Smuzhiyun default y 108*4882a593Smuzhiyun help 109*4882a593Smuzhiyun Select this to supports the Synopsys Designware Ethernet QOS (Quality 110*4882a593Smuzhiyun Of Service) IP block for all chips, default is Y, if select it N, only 111*4882a593Smuzhiyun support rockchip's chips. 112*4882a593Smuzhiyun 113*4882a593Smuzhiyunconfig E1000 114*4882a593Smuzhiyun bool "Intel PRO/1000 Gigabit Ethernet support" 115*4882a593Smuzhiyun help 116*4882a593Smuzhiyun This driver supports Intel(R) PRO/1000 gigabit ethernet family of 117*4882a593Smuzhiyun adapters. For more information on how to identify your adapter, go 118*4882a593Smuzhiyun to the Adapter & Driver ID Guide at: 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun <http://support.intel.com/support/network/adapter/pro100/21397.htm> 121*4882a593Smuzhiyun 122*4882a593Smuzhiyunconfig E1000_SPI_GENERIC 123*4882a593Smuzhiyun bool "Allow access to the Intel 8257x SPI bus" 124*4882a593Smuzhiyun depends on E1000 125*4882a593Smuzhiyun help 126*4882a593Smuzhiyun Allow generic access to the SPI bus on the Intel 8257x, for 127*4882a593Smuzhiyun example with the "sspi" command. 128*4882a593Smuzhiyun 129*4882a593Smuzhiyunconfig E1000_SPI 130*4882a593Smuzhiyun bool "Enable SPI bus utility code" 131*4882a593Smuzhiyun depends on E1000 132*4882a593Smuzhiyun help 133*4882a593Smuzhiyun Utility code for direct access to the SPI bus on Intel 8257x. 134*4882a593Smuzhiyun This does not do anything useful unless you set at least one 135*4882a593Smuzhiyun of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. 136*4882a593Smuzhiyun 137*4882a593Smuzhiyunconfig CMD_E1000 138*4882a593Smuzhiyun bool "Enable the e1000 command" 139*4882a593Smuzhiyun depends on E1000 140*4882a593Smuzhiyun help 141*4882a593Smuzhiyun This enables the 'e1000' management command for E1000 devices. When 142*4882a593Smuzhiyun used on devices with SPI support you can reprogram the EEPROM from 143*4882a593Smuzhiyun U-Boot. 144*4882a593Smuzhiyun 145*4882a593Smuzhiyunconfig ETH_SANDBOX 146*4882a593Smuzhiyun depends on DM_ETH && SANDBOX 147*4882a593Smuzhiyun default y 148*4882a593Smuzhiyun bool "Sandbox: Mocked Ethernet driver" 149*4882a593Smuzhiyun help 150*4882a593Smuzhiyun This driver simply responds with fake ARP replies and ping 151*4882a593Smuzhiyun replies that are used to verify network stack functionality 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun This driver is particularly useful in the test/dm/eth.c tests 154*4882a593Smuzhiyun 155*4882a593Smuzhiyunconfig ETH_SANDBOX_RAW 156*4882a593Smuzhiyun depends on DM_ETH && SANDBOX 157*4882a593Smuzhiyun default y 158*4882a593Smuzhiyun bool "Sandbox: Bridge to Linux Raw Sockets" 159*4882a593Smuzhiyun help 160*4882a593Smuzhiyun This driver is a bridge from the bottom of the network stack 161*4882a593Smuzhiyun in U-Boot to the RAW AF_PACKET API in Linux. This allows real 162*4882a593Smuzhiyun network traffic to be tested from within sandbox. See 163*4882a593Smuzhiyun board/sandbox/README.sandbox for more details. 164*4882a593Smuzhiyun 165*4882a593Smuzhiyunconfig ETH_DESIGNWARE 166*4882a593Smuzhiyun bool "Synopsys Designware Ethernet MAC" 167*4882a593Smuzhiyun select PHYLIB 168*4882a593Smuzhiyun help 169*4882a593Smuzhiyun This MAC is present in SoCs from various vendors. It supports 170*4882a593Smuzhiyun 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to 171*4882a593Smuzhiyun provide the PHY (physical media interface). 172*4882a593Smuzhiyun 173*4882a593Smuzhiyunconfig ETHOC 174*4882a593Smuzhiyun bool "OpenCores 10/100 Mbps Ethernet MAC" 175*4882a593Smuzhiyun help 176*4882a593Smuzhiyun This MAC is present in OpenRISC and Xtensa XTFPGA boards. 177*4882a593Smuzhiyun 178*4882a593Smuzhiyunconfig FEC_MXC 179*4882a593Smuzhiyun bool "FEC Ethernet controller" 180*4882a593Smuzhiyun depends on MX5 || MX6 181*4882a593Smuzhiyun help 182*4882a593Smuzhiyun This driver supports the 10/100 Fast Ethernet controller for 183*4882a593Smuzhiyun NXP i.MX processors. 184*4882a593Smuzhiyun 185*4882a593Smuzhiyunconfig FTMAC100 186*4882a593Smuzhiyun bool "Ftmac100 Ethernet Support" 187*4882a593Smuzhiyun help 188*4882a593Smuzhiyun This MAC is present in Andestech SoCs. 189*4882a593Smuzhiyun 190*4882a593Smuzhiyunconfig MVPP2 191*4882a593Smuzhiyun bool "Marvell Armada 375/7K/8K network interface support" 192*4882a593Smuzhiyun depends on ARMADA_375 || ARMADA_8K 193*4882a593Smuzhiyun select PHYLIB 194*4882a593Smuzhiyun help 195*4882a593Smuzhiyun This driver supports the network interface units in the 196*4882a593Smuzhiyun Marvell ARMADA 375, 7K and 8K SoCs. 197*4882a593Smuzhiyun 198*4882a593Smuzhiyunconfig MACB 199*4882a593Smuzhiyun bool "Cadence MACB/GEM Ethernet Interface" 200*4882a593Smuzhiyun depends on DM_ETH 201*4882a593Smuzhiyun select PHYLIB 202*4882a593Smuzhiyun help 203*4882a593Smuzhiyun The Cadence MACB ethernet interface is found on many Atmel 204*4882a593Smuzhiyun AT91 and SAMA5 parts. This driver also supports the Cadence 205*4882a593Smuzhiyun GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. 206*4882a593Smuzhiyun Say Y to include support for the MACB/GEM chip. 207*4882a593Smuzhiyun 208*4882a593Smuzhiyunconfig PCH_GBE 209*4882a593Smuzhiyun bool "Intel Platform Controller Hub EG20T GMAC driver" 210*4882a593Smuzhiyun depends on DM_ETH && DM_PCI 211*4882a593Smuzhiyun select PHYLIB 212*4882a593Smuzhiyun help 213*4882a593Smuzhiyun This MAC is present in Intel Platform Controller Hub EG20T. It 214*4882a593Smuzhiyun supports 10/100/1000 Mbps operation. 215*4882a593Smuzhiyun 216*4882a593Smuzhiyunconfig RGMII 217*4882a593Smuzhiyun bool "Enable RGMII" 218*4882a593Smuzhiyun help 219*4882a593Smuzhiyun Enable the support of the Reduced Gigabit Media-Independent 220*4882a593Smuzhiyun Interface (RGMII). 221*4882a593Smuzhiyun 222*4882a593Smuzhiyunconfig RTL8139 223*4882a593Smuzhiyun bool "Realtek 8139 series Ethernet controller driver" 224*4882a593Smuzhiyun help 225*4882a593Smuzhiyun This driver supports Realtek 8139 series fast ethernet family of 226*4882a593Smuzhiyun PCI chipsets/adapters. 227*4882a593Smuzhiyun 228*4882a593Smuzhiyunconfig RTL8169 229*4882a593Smuzhiyun bool "Realtek 8169 series Ethernet controller driver" 230*4882a593Smuzhiyun help 231*4882a593Smuzhiyun This driver supports Realtek 8169 series gigabit ethernet family of 232*4882a593Smuzhiyun PCI/PCIe chipsets/adapters. 233*4882a593Smuzhiyun 234*4882a593Smuzhiyunconfig SUN7I_GMAC 235*4882a593Smuzhiyun bool "Enable Allwinner GMAC Ethernet support" 236*4882a593Smuzhiyun help 237*4882a593Smuzhiyun Enable the support for Sun7i GMAC Ethernet controller 238*4882a593Smuzhiyun 239*4882a593Smuzhiyunconfig SUN4I_EMAC 240*4882a593Smuzhiyun bool "Allwinner Sun4i Ethernet MAC support" 241*4882a593Smuzhiyun depends on DM_ETH 242*4882a593Smuzhiyun help 243*4882a593Smuzhiyun This driver supports the Allwinner based SUN4I Ethernet MAC. 244*4882a593Smuzhiyun 245*4882a593Smuzhiyunconfig SUN8I_EMAC 246*4882a593Smuzhiyun bool "Allwinner Sun8i Ethernet MAC support" 247*4882a593Smuzhiyun depends on DM_ETH 248*4882a593Smuzhiyun select PHYLIB 249*4882a593Smuzhiyun select PHY_GIGE 250*4882a593Smuzhiyun help 251*4882a593Smuzhiyun This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. 252*4882a593Smuzhiyun It can be found in H3/A64/A83T based SoCs and compatible with both 253*4882a593Smuzhiyun External and Internal PHYs. 254*4882a593Smuzhiyun 255*4882a593Smuzhiyunconfig XILINX_AXIEMAC 256*4882a593Smuzhiyun depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) 257*4882a593Smuzhiyun select PHYLIB 258*4882a593Smuzhiyun select MII 259*4882a593Smuzhiyun bool "Xilinx AXI Ethernet" 260*4882a593Smuzhiyun help 261*4882a593Smuzhiyun This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 262*4882a593Smuzhiyun 263*4882a593Smuzhiyunconfig XILINX_EMACLITE 264*4882a593Smuzhiyun depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) 265*4882a593Smuzhiyun select PHYLIB 266*4882a593Smuzhiyun select MII 267*4882a593Smuzhiyun bool "Xilinx Ethernetlite" 268*4882a593Smuzhiyun help 269*4882a593Smuzhiyun This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 270*4882a593Smuzhiyun 271*4882a593Smuzhiyunconfig ZYNQ_GEM 272*4882a593Smuzhiyun depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) 273*4882a593Smuzhiyun select PHYLIB 274*4882a593Smuzhiyun bool "Xilinx Ethernet GEM" 275*4882a593Smuzhiyun help 276*4882a593Smuzhiyun This MAC is present in Xilinx Zynq and ZynqMP SoCs. 277*4882a593Smuzhiyun 278*4882a593Smuzhiyunconfig PIC32_ETH 279*4882a593Smuzhiyun bool "Microchip PIC32 Ethernet Support" 280*4882a593Smuzhiyun depends on DM_ETH && MACH_PIC32 281*4882a593Smuzhiyun select PHYLIB 282*4882a593Smuzhiyun help 283*4882a593Smuzhiyun This driver implements 10/100 Mbps Ethernet and MAC layer for 284*4882a593Smuzhiyun Microchip PIC32 microcontrollers. 285*4882a593Smuzhiyun 286*4882a593Smuzhiyunconfig GMAC_ROCKCHIP 287*4882a593Smuzhiyun bool "Rockchip Synopsys Designware Ethernet MAC" 288*4882a593Smuzhiyun depends on DM_ETH && (ETH_DESIGNWARE || DWC_ETH_QOS) 289*4882a593Smuzhiyun help 290*4882a593Smuzhiyun This driver provides Rockchip SoCs network support based on the 291*4882a593Smuzhiyun Synopsys Designware driver. 292*4882a593Smuzhiyun 293*4882a593Smuzhiyunconfig RENESAS_RAVB 294*4882a593Smuzhiyun bool "Renesas Ethernet AVB MAC" 295*4882a593Smuzhiyun depends on DM_ETH && RCAR_GEN3 296*4882a593Smuzhiyun select PHYLIB 297*4882a593Smuzhiyun help 298*4882a593Smuzhiyun This driver implements support for the Ethernet AVB block in 299*4882a593Smuzhiyun Renesas M3 and H3 SoCs. 300*4882a593Smuzhiyun 301*4882a593Smuzhiyunconfig MPC8XX_FEC 302*4882a593Smuzhiyun bool "Fast Ethernet Controller on MPC8XX" 303*4882a593Smuzhiyun depends on MPC8xx 304*4882a593Smuzhiyun select MII 305*4882a593Smuzhiyun help 306*4882a593Smuzhiyun This driver implements support for the Fast Ethernet Controller 307*4882a593Smuzhiyun on MPC8XX 308*4882a593Smuzhiyun 309*4882a593Smuzhiyunconfig ETHER_ON_FEC1 310*4882a593Smuzhiyun bool "FEC1" 311*4882a593Smuzhiyun depends on MPC8XX_FEC 312*4882a593Smuzhiyun default y 313*4882a593Smuzhiyun 314*4882a593Smuzhiyunconfig FEC1_PHY 315*4882a593Smuzhiyun int "FEC1 PHY" 316*4882a593Smuzhiyun depends on ETHER_ON_FEC1 317*4882a593Smuzhiyun default -1 318*4882a593Smuzhiyun help 319*4882a593Smuzhiyun Define to the hardcoded PHY address which corresponds 320*4882a593Smuzhiyun to the given FEC; i. e. 321*4882a593Smuzhiyun #define CONFIG_FEC1_PHY 4 322*4882a593Smuzhiyun means that the PHY with address 4 is connected to FEC1 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun When set to -1, means to probe for first available. 325*4882a593Smuzhiyun 326*4882a593Smuzhiyunconfig PHY_NORXERR 327*4882a593Smuzhiyun bool "PHY_NORXERR" 328*4882a593Smuzhiyun depends on ETHER_ON_FEC1 329*4882a593Smuzhiyun default n 330*4882a593Smuzhiyun help 331*4882a593Smuzhiyun The PHY does not have a RXERR line (RMII only). 332*4882a593Smuzhiyun (so program the FEC to ignore it). 333*4882a593Smuzhiyun 334*4882a593Smuzhiyunconfig ETHER_ON_FEC2 335*4882a593Smuzhiyun bool "FEC2" 336*4882a593Smuzhiyun depends on MPC8XX_FEC && MPC885 337*4882a593Smuzhiyun default y 338*4882a593Smuzhiyun 339*4882a593Smuzhiyunconfig FEC2_PHY 340*4882a593Smuzhiyun int "FEC2 PHY" 341*4882a593Smuzhiyun depends on ETHER_ON_FEC2 342*4882a593Smuzhiyun default -1 343*4882a593Smuzhiyun help 344*4882a593Smuzhiyun Define to the hardcoded PHY address which corresponds 345*4882a593Smuzhiyun to the given FEC; i. e. 346*4882a593Smuzhiyun #define CONFIG_FEC1_PHY 4 347*4882a593Smuzhiyun means that the PHY with address 4 is connected to FEC1 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun When set to -1, means to probe for first available. 350*4882a593Smuzhiyun 351*4882a593Smuzhiyunconfig FEC2_PHY_NORXERR 352*4882a593Smuzhiyun bool "PHY_NORXERR" 353*4882a593Smuzhiyun depends on ETHER_ON_FEC2 354*4882a593Smuzhiyun default n 355*4882a593Smuzhiyun help 356*4882a593Smuzhiyun The PHY does not have a RXERR line (RMII only). 357*4882a593Smuzhiyun (so program the FEC to ignore it). 358*4882a593Smuzhiyun 359*4882a593Smuzhiyunendif # NETDEVICES 360