1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * SPI flash internal definitions 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2008 Atmel Corporation 5*4882a593Smuzhiyun * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _SF_INTERNAL_H_ 11*4882a593Smuzhiyun #define _SF_INTERNAL_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/types.h> 14*4882a593Smuzhiyun #include <linux/compiler.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define SPI_NOR_MAX_ID_LEN 6 17*4882a593Smuzhiyun #define SPI_NOR_MAX_ADDR_WIDTH 4 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun struct flash_info { 20*4882a593Smuzhiyun #if !CONFIG_IS_ENABLED(SPI_FLASH_TINY) 21*4882a593Smuzhiyun char *name; 22*4882a593Smuzhiyun #endif 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * This array stores the ID bytes. 26*4882a593Smuzhiyun * The first three bytes are the JEDIC ID. 27*4882a593Smuzhiyun * JEDEC ID zero means "no ID" (mostly older chips). 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun u8 id[SPI_NOR_MAX_ID_LEN]; 30*4882a593Smuzhiyun u8 id_len; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* The size listed here is what works with SPINOR_OP_SE, which isn't 33*4882a593Smuzhiyun * necessarily called a "sector" by the vendor. 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun unsigned int sector_size; 36*4882a593Smuzhiyun u16 n_sectors; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun u16 page_size; 39*4882a593Smuzhiyun u16 addr_width; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun u32 flags; 42*4882a593Smuzhiyun #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */ 43*4882a593Smuzhiyun #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */ 44*4882a593Smuzhiyun #define SST_WRITE BIT(2) /* use SST byte programming */ 45*4882a593Smuzhiyun #define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */ 46*4882a593Smuzhiyun #define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */ 47*4882a593Smuzhiyun #define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */ 48*4882a593Smuzhiyun #define SPI_NOR_QUAD_READ BIT(6) /* Flash supports Quad Read */ 49*4882a593Smuzhiyun #define USE_FSR BIT(7) /* use flag status register */ 50*4882a593Smuzhiyun #define SPI_NOR_HAS_LOCK BIT(8) /* Flash supports lock/unlock via SR */ 51*4882a593Smuzhiyun #define SPI_NOR_HAS_TB BIT(9) /* 52*4882a593Smuzhiyun * Flash SR has Top/Bottom (TB) protect 53*4882a593Smuzhiyun * bit. Must be used with 54*4882a593Smuzhiyun * SPI_NOR_HAS_LOCK. 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun #define SPI_S3AN BIT(10) /* 57*4882a593Smuzhiyun * Xilinx Spartan 3AN In-System Flash 58*4882a593Smuzhiyun * (MFR cannot be used for probing 59*4882a593Smuzhiyun * because it has the same value as 60*4882a593Smuzhiyun * ATMEL flashes) 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun #define SPI_NOR_4B_OPCODES BIT(11) /* 63*4882a593Smuzhiyun * Use dedicated 4byte address op codes 64*4882a593Smuzhiyun * to support memory size above 128Mib. 65*4882a593Smuzhiyun */ 66*4882a593Smuzhiyun #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */ 67*4882a593Smuzhiyun #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */ 68*4882a593Smuzhiyun #define USE_CLSR BIT(14) /* use CLSR command */ 69*4882a593Smuzhiyun #define SPI_NOR_HAS_SST26LOCK BIT(15) /* Flash supports lock/unlock via BPR */ 70*4882a593Smuzhiyun #define SPI_NOR_OCTAL_READ BIT(16) /* Flash supports Octal Read */ 71*4882a593Smuzhiyun #define SPI_NOR_OCTAL_DTR_READ BIT(17) /* Flash supports Octal DTR Read */ 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun extern const struct flash_info spi_nor_ids[]; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #define JEDEC_MFR(info) ((info)->id[0]) 77*4882a593Smuzhiyun #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* Get software write-protect value (BP bits) */ 80*4882a593Smuzhiyun int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash); 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #ifdef CONFIG_SPI_FLASH_MTD 84*4882a593Smuzhiyun int spi_flash_mtd_register(struct spi_flash *flash); 85*4882a593Smuzhiyun void spi_flash_mtd_unregister(void); 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun #endif /* _SF_INTERNAL_H_ */ 88