1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Based on code:
5*4882a593Smuzhiyun * Copyright (C) 2005-2009 Samsung Electronics
6*4882a593Smuzhiyun * Kyungmin Park <kyungmin.park@samsung.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <linux/mtd/onenand_regs.h>
14*4882a593Smuzhiyun #include <onenand_uboot.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun * Device geometry:
18*4882a593Smuzhiyun * - 2048b page, 128k erase block.
19*4882a593Smuzhiyun * - 4096b page, 256k erase block.
20*4882a593Smuzhiyun */
21*4882a593Smuzhiyun enum onenand_spl_pagesize {
22*4882a593Smuzhiyun PAGE_2K = 2048,
23*4882a593Smuzhiyun PAGE_4K = 4096,
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static unsigned int density_mask;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define ONENAND_PAGES_PER_BLOCK 64
29*4882a593Smuzhiyun #define onenand_sector_address(page) (page << 2)
30*4882a593Smuzhiyun #define onenand_buffer_address() ((1 << 3) << 8)
31*4882a593Smuzhiyun
onenand_block_address(int block)32*4882a593Smuzhiyun static inline int onenand_block_address(int block)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun /* Device Flash Core select, NAND Flash Block Address */
35*4882a593Smuzhiyun if (block & density_mask)
36*4882a593Smuzhiyun return ONENAND_DDP_CHIP1 | (block ^ density_mask);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return block;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
onenand_bufferram_address(int block)41*4882a593Smuzhiyun static inline int onenand_bufferram_address(int block)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun /* Device BufferRAM Select */
44*4882a593Smuzhiyun if (block & density_mask)
45*4882a593Smuzhiyun return ONENAND_DDP_CHIP1;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun return ONENAND_DDP_CHIP0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
onenand_readw(uint32_t addr)50*4882a593Smuzhiyun static inline uint16_t onenand_readw(uint32_t addr)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun return readw(CONFIG_SYS_ONENAND_BASE + addr);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
onenand_writew(uint16_t value,uint32_t addr)55*4882a593Smuzhiyun static inline void onenand_writew(uint16_t value, uint32_t addr)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun writew(value, CONFIG_SYS_ONENAND_BASE + addr);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
onenand_spl_get_geometry(void)60*4882a593Smuzhiyun static enum onenand_spl_pagesize onenand_spl_get_geometry(void)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun unsigned int dev_id, density, size;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if (!onenand_readw(ONENAND_REG_TECHNOLOGY)) {
65*4882a593Smuzhiyun dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
66*4882a593Smuzhiyun density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
67*4882a593Smuzhiyun density &= ONENAND_DEVICE_DENSITY_MASK;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun if (density < ONENAND_DEVICE_DENSITY_4Gb)
70*4882a593Smuzhiyun return PAGE_2K;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun if (dev_id & ONENAND_DEVICE_IS_DDP) {
73*4882a593Smuzhiyun size = onenand_readw(ONENAND_REG_DATA_BUFFER_SIZE);
74*4882a593Smuzhiyun density_mask = 1 << (18 + density - ffs(size));
75*4882a593Smuzhiyun return PAGE_2K;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun return PAGE_4K;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
onenand_spl_read_page(uint32_t block,uint32_t page,uint32_t * buf,enum onenand_spl_pagesize pagesize)82*4882a593Smuzhiyun static int onenand_spl_read_page(uint32_t block, uint32_t page, uint32_t *buf,
83*4882a593Smuzhiyun enum onenand_spl_pagesize pagesize)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun const uint32_t addr = CONFIG_SYS_ONENAND_BASE + ONENAND_DATARAM;
86*4882a593Smuzhiyun uint32_t offset;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun onenand_writew(onenand_block_address(block),
89*4882a593Smuzhiyun ONENAND_REG_START_ADDRESS1);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun onenand_writew(onenand_bufferram_address(block),
92*4882a593Smuzhiyun ONENAND_REG_START_ADDRESS2);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun onenand_writew(onenand_sector_address(page),
95*4882a593Smuzhiyun ONENAND_REG_START_ADDRESS8);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun onenand_writew(onenand_buffer_address(),
98*4882a593Smuzhiyun ONENAND_REG_START_BUFFER);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun onenand_writew(ONENAND_INT_CLEAR, ONENAND_REG_INTERRUPT);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun onenand_writew(ONENAND_CMD_READ, ONENAND_REG_COMMAND);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun while (!(onenand_readw(ONENAND_REG_INTERRUPT) & ONENAND_INT_READ))
105*4882a593Smuzhiyun continue;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Check for invalid block mark */
108*4882a593Smuzhiyun if (page < 2 && (onenand_readw(ONENAND_SPARERAM) != 0xffff))
109*4882a593Smuzhiyun return 1;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun for (offset = 0; offset < pagesize; offset += 4)
112*4882a593Smuzhiyun buf[offset / 4] = readl(addr + offset);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #ifdef CONFIG_SPL_UBI
118*4882a593Smuzhiyun /* Temporary storage for non page aligned and non page sized reads. */
119*4882a593Smuzhiyun static u8 scratch_buf[PAGE_4K];
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /**
122*4882a593Smuzhiyun * onenand_spl_read_block - Read data from physical eraseblock into a buffer
123*4882a593Smuzhiyun * @block: Number of the physical eraseblock
124*4882a593Smuzhiyun * @offset: Data offset from the start of @peb
125*4882a593Smuzhiyun * @len: Data size to read
126*4882a593Smuzhiyun * @dst: Address of the destination buffer
127*4882a593Smuzhiyun *
128*4882a593Smuzhiyun * Notes:
129*4882a593Smuzhiyun * @offset + @len are not allowed to be larger than a physical
130*4882a593Smuzhiyun * erase block. No sanity check done for simplicity reasons.
131*4882a593Smuzhiyun */
onenand_spl_read_block(int block,int offset,int len,void * dst)132*4882a593Smuzhiyun int onenand_spl_read_block(int block, int offset, int len, void *dst)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun int page, read;
135*4882a593Smuzhiyun static int psize;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (!psize)
138*4882a593Smuzhiyun psize = onenand_spl_get_geometry();
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* Calculate the page number */
141*4882a593Smuzhiyun page = offset / psize;
142*4882a593Smuzhiyun /* Offset to the start of a flash page */
143*4882a593Smuzhiyun offset = offset % psize;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun while (len) {
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun * Non page aligned reads go to the scratch buffer.
148*4882a593Smuzhiyun * Page aligned reads go directly to the destination.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun if (offset || len < psize) {
151*4882a593Smuzhiyun onenand_spl_read_page(block, page,
152*4882a593Smuzhiyun (uint32_t *)scratch_buf, psize);
153*4882a593Smuzhiyun read = min(len, psize - offset);
154*4882a593Smuzhiyun memcpy(dst, scratch_buf + offset, read);
155*4882a593Smuzhiyun offset = 0;
156*4882a593Smuzhiyun } else {
157*4882a593Smuzhiyun onenand_spl_read_page(block, page, dst, psize);
158*4882a593Smuzhiyun read = psize;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun page++;
161*4882a593Smuzhiyun len -= read;
162*4882a593Smuzhiyun dst += read;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun #endif
167*4882a593Smuzhiyun
onenand_spl_load_image(uint32_t offs,uint32_t size,void * dst)168*4882a593Smuzhiyun void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun uint32_t *addr = (uint32_t *)dst;
171*4882a593Smuzhiyun uint32_t to_page;
172*4882a593Smuzhiyun uint32_t block;
173*4882a593Smuzhiyun uint32_t page, rpage;
174*4882a593Smuzhiyun enum onenand_spl_pagesize pagesize;
175*4882a593Smuzhiyun int ret;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun pagesize = onenand_spl_get_geometry();
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /*
180*4882a593Smuzhiyun * The page can be either 2k or 4k, avoid using DIV_ROUND_UP to avoid
181*4882a593Smuzhiyun * pulling further unwanted functions into the SPL.
182*4882a593Smuzhiyun */
183*4882a593Smuzhiyun if (pagesize == 2048) {
184*4882a593Smuzhiyun page = offs / 2048;
185*4882a593Smuzhiyun to_page = page + DIV_ROUND_UP(size, 2048);
186*4882a593Smuzhiyun } else {
187*4882a593Smuzhiyun page = offs / 4096;
188*4882a593Smuzhiyun to_page = page + DIV_ROUND_UP(size, 4096);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun for (; page <= to_page; page++) {
192*4882a593Smuzhiyun block = page / ONENAND_PAGES_PER_BLOCK;
193*4882a593Smuzhiyun rpage = page & (ONENAND_PAGES_PER_BLOCK - 1);
194*4882a593Smuzhiyun ret = onenand_spl_read_page(block, rpage, addr, pagesize);
195*4882a593Smuzhiyun if (ret)
196*4882a593Smuzhiyun page += ONENAND_PAGES_PER_BLOCK - 1;
197*4882a593Smuzhiyun else
198*4882a593Smuzhiyun addr += pagesize / 4;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun }
201