xref: /OK3568_Linux_fs/u-boot/drivers/mtd/nand/spi/winbond.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2017 exceet electronics GmbH
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Authors:
6*4882a593Smuzhiyun  *	Frieder Schrempf <frieder.schrempf@exceet.de>
7*4882a593Smuzhiyun  *	Boris Brezillon <boris.brezillon@bootlin.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef __UBOOT__
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #endif
14*4882a593Smuzhiyun #include <linux/mtd/spinand.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define SPINAND_MFR_WINBOND		0xEF
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define WINBOND_CFG_BUF_READ		BIT(3)
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(read_cache_variants,
21*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
22*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
23*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
24*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
25*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
26*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(write_cache_variants,
29*4882a593Smuzhiyun 		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
30*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(true, 0, NULL, 0));
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(update_cache_variants,
33*4882a593Smuzhiyun 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
34*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
35*4882a593Smuzhiyun 
w25m02gv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)36*4882a593Smuzhiyun static int w25m02gv_ooblayout_ecc(struct mtd_info *mtd, int section,
37*4882a593Smuzhiyun 				  struct mtd_oob_region *region)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun 	if (section > 3)
40*4882a593Smuzhiyun 		return -ERANGE;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	region->offset = (16 * section) + 8;
43*4882a593Smuzhiyun 	region->length = 8;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	return 0;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
w25m02gv_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)48*4882a593Smuzhiyun static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
49*4882a593Smuzhiyun 				   struct mtd_oob_region *region)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	if (section > 3)
52*4882a593Smuzhiyun 		return -ERANGE;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	region->offset = (16 * section) + 2;
55*4882a593Smuzhiyun 	region->length = 6;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
61*4882a593Smuzhiyun 	.ecc = w25m02gv_ooblayout_ecc,
62*4882a593Smuzhiyun 	.rfree = w25m02gv_ooblayout_free,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
w25m02gv_select_target(struct spinand_device * spinand,unsigned int target)65*4882a593Smuzhiyun static int w25m02gv_select_target(struct spinand_device *spinand,
66*4882a593Smuzhiyun 				  unsigned int target)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
69*4882a593Smuzhiyun 					  SPI_MEM_OP_NO_ADDR,
70*4882a593Smuzhiyun 					  SPI_MEM_OP_NO_DUMMY,
71*4882a593Smuzhiyun 					  SPI_MEM_OP_DATA_OUT(1,
72*4882a593Smuzhiyun 							spinand->scratchbuf,
73*4882a593Smuzhiyun 							1));
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	*spinand->scratchbuf = target;
76*4882a593Smuzhiyun 	return spi_mem_exec_op(spinand->slave, &op);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
w25n02kv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)79*4882a593Smuzhiyun static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
80*4882a593Smuzhiyun 				  struct mtd_oob_region *region)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	if (section)
83*4882a593Smuzhiyun 		return -ERANGE;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	region->offset = 64;
86*4882a593Smuzhiyun 	region->length = 64;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
w25n02kv_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)91*4882a593Smuzhiyun static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
92*4882a593Smuzhiyun 				   struct mtd_oob_region *region)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	if (section)
95*4882a593Smuzhiyun 		return -ERANGE;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	/* Reserve 2 bytes for the BBM. */
98*4882a593Smuzhiyun 	region->offset = 2;
99*4882a593Smuzhiyun 	region->length = 62;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
105*4882a593Smuzhiyun 	.ecc = w25n02kv_ooblayout_ecc,
106*4882a593Smuzhiyun 	.rfree = w25n02kv_ooblayout_free,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
w25n02kv_ecc_get_status(struct spinand_device * spinand,u8 status)109*4882a593Smuzhiyun static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
110*4882a593Smuzhiyun 				   u8 status)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	struct nand_device *nand = spinand_to_nand(spinand);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	switch (status & STATUS_ECC_MASK) {
115*4882a593Smuzhiyun 	case STATUS_ECC_NO_BITFLIPS:
116*4882a593Smuzhiyun 		return 0;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	case STATUS_ECC_UNCOR_ERROR:
119*4882a593Smuzhiyun 		return -EBADMSG;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	case STATUS_ECC_HAS_BITFLIPS:
122*4882a593Smuzhiyun 		return 1;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	default:
125*4882a593Smuzhiyun 		return nand->eccreq.strength;
126*4882a593Smuzhiyun 	}
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	return -EINVAL;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* Another set for the same id[2] devices in one series */
132*4882a593Smuzhiyun static const struct spinand_info winbond_spinand_table[] = {
133*4882a593Smuzhiyun 	SPINAND_INFO("W25M02GV",
134*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAB),
135*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 2),
136*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
137*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
138*4882a593Smuzhiyun 					      &write_cache_variants,
139*4882a593Smuzhiyun 					      &update_cache_variants),
140*4882a593Smuzhiyun 		     0,
141*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
142*4882a593Smuzhiyun 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
143*4882a593Smuzhiyun 	SPINAND_INFO("W25N512GV",
144*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x20),
145*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 512, 1, 1, 1),
146*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
147*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
148*4882a593Smuzhiyun 					      &write_cache_variants,
149*4882a593Smuzhiyun 					      &update_cache_variants),
150*4882a593Smuzhiyun 		     0,
151*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
152*4882a593Smuzhiyun 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
153*4882a593Smuzhiyun 	SPINAND_INFO("W25N01GV",
154*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x21),
155*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
156*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
157*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
158*4882a593Smuzhiyun 					      &write_cache_variants,
159*4882a593Smuzhiyun 					      &update_cache_variants),
160*4882a593Smuzhiyun 		     0,
161*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
162*4882a593Smuzhiyun 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
163*4882a593Smuzhiyun 	SPINAND_INFO("W25N02KV",
164*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x22),
165*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
166*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
167*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
168*4882a593Smuzhiyun 					      &write_cache_variants,
169*4882a593Smuzhiyun 					      &update_cache_variants),
170*4882a593Smuzhiyun 		     0,
171*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
172*4882a593Smuzhiyun 				     w25n02kv_ecc_get_status)),
173*4882a593Smuzhiyun 	SPINAND_INFO("W25N04KV",
174*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x23),
175*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 4096, 1, 1, 1),
176*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
177*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
178*4882a593Smuzhiyun 					      &write_cache_variants,
179*4882a593Smuzhiyun 					      &update_cache_variants),
180*4882a593Smuzhiyun 		     0,
181*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
182*4882a593Smuzhiyun 				     w25n02kv_ecc_get_status)),
183*4882a593Smuzhiyun 	SPINAND_INFO("W25N01GW",
184*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x21),
185*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
186*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
187*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
188*4882a593Smuzhiyun 					      &write_cache_variants,
189*4882a593Smuzhiyun 					      &update_cache_variants),
190*4882a593Smuzhiyun 		     0,
191*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
192*4882a593Smuzhiyun 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
193*4882a593Smuzhiyun 	SPINAND_INFO("W25N02KW",
194*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x22),
195*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
196*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
197*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
198*4882a593Smuzhiyun 					      &write_cache_variants,
199*4882a593Smuzhiyun 					      &update_cache_variants),
200*4882a593Smuzhiyun 		     0,
201*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
202*4882a593Smuzhiyun 				     w25n02kv_ecc_get_status)),
203*4882a593Smuzhiyun 	SPINAND_INFO("W25N01KV",
204*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAE, 0x21),
205*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
206*4882a593Smuzhiyun 		     NAND_ECCREQ(4, 512),
207*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
208*4882a593Smuzhiyun 					      &write_cache_variants,
209*4882a593Smuzhiyun 					      &update_cache_variants),
210*4882a593Smuzhiyun 		     0,
211*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
212*4882a593Smuzhiyun 				     w25n02kv_ecc_get_status)),
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun 
winbond_spinand_init(struct spinand_device * spinand)215*4882a593Smuzhiyun static int winbond_spinand_init(struct spinand_device *spinand)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	struct nand_device *nand = spinand_to_nand(spinand);
218*4882a593Smuzhiyun 	unsigned int i;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	/*
221*4882a593Smuzhiyun 	 * Make sure all dies are in buffer read mode and not continuous read
222*4882a593Smuzhiyun 	 * mode.
223*4882a593Smuzhiyun 	 */
224*4882a593Smuzhiyun 	for (i = 0; i < nand->memorg.ntargets; i++) {
225*4882a593Smuzhiyun 		spinand_select_target(spinand, i);
226*4882a593Smuzhiyun 		spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ,
227*4882a593Smuzhiyun 				WINBOND_CFG_BUF_READ);
228*4882a593Smuzhiyun 	}
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return 0;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
234*4882a593Smuzhiyun 	.init = winbond_spinand_init,
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun const struct spinand_manufacturer winbond_spinand_manufacturer = {
238*4882a593Smuzhiyun 	.id = SPINAND_MFR_WINBOND,
239*4882a593Smuzhiyun 	.name = "Winbond",
240*4882a593Smuzhiyun 	.chips = winbond_spinand_table,
241*4882a593Smuzhiyun 	.nchips = ARRAY_SIZE(winbond_spinand_table),
242*4882a593Smuzhiyun 	.ops = &winbond_spinand_manuf_ops,
243*4882a593Smuzhiyun };
244