xref: /OK3568_Linux_fs/u-boot/drivers/mtd/nand/spi/toshiba.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2018 exceet electronics GmbH
4*4882a593Smuzhiyun  * Copyright (c) 2018 Kontron Electronics GmbH
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Author: Frieder Schrempf <frieder.schrempf@kontron.de>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __UBOOT__
10*4882a593Smuzhiyun #include <malloc.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #endif
14*4882a593Smuzhiyun #include <linux/mtd/spinand.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define SPINAND_MFR_TOSHIBA		0x98
17*4882a593Smuzhiyun #define TOSH_STATUS_ECC_HAS_BITFLIPS_T	(3 << 4)
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(read_cache_variants,
20*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
21*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
22*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
23*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(write_cache_variants,
26*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(true, 0, NULL, 0));
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(update_cache_variants,
29*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
30*4882a593Smuzhiyun 
tc58cxgxsx_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)31*4882a593Smuzhiyun static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section,
32*4882a593Smuzhiyun 				     struct mtd_oob_region *region)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	if (section > 0)
35*4882a593Smuzhiyun 		return -ERANGE;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	region->offset = mtd->oobsize / 2;
38*4882a593Smuzhiyun 	region->length = mtd->oobsize / 2;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	return 0;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
tc58cxgxsx_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)43*4882a593Smuzhiyun static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section,
44*4882a593Smuzhiyun 				      struct mtd_oob_region *region)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	if (section > 0)
47*4882a593Smuzhiyun 		return -ERANGE;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	/* 2 bytes reserved for BBM */
50*4882a593Smuzhiyun 	region->offset = 2;
51*4882a593Smuzhiyun 	region->length = (mtd->oobsize / 2) - 2;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	return 0;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun static const struct mtd_ooblayout_ops tc58cxgxsx_ooblayout = {
57*4882a593Smuzhiyun 	.ecc = tc58cxgxsx_ooblayout_ecc,
58*4882a593Smuzhiyun 	.rfree = tc58cxgxsx_ooblayout_free,
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
tc58cxgxsx_ecc_get_status(struct spinand_device * spinand,u8 status)61*4882a593Smuzhiyun static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
62*4882a593Smuzhiyun 				      u8 status)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	struct nand_device *nand = spinand_to_nand(spinand);
65*4882a593Smuzhiyun 	u8 mbf = 0;
66*4882a593Smuzhiyun 	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	switch (status & STATUS_ECC_MASK) {
69*4882a593Smuzhiyun 	case STATUS_ECC_NO_BITFLIPS:
70*4882a593Smuzhiyun 		return 0;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	case STATUS_ECC_UNCOR_ERROR:
73*4882a593Smuzhiyun 		return -EBADMSG;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	case STATUS_ECC_HAS_BITFLIPS:
76*4882a593Smuzhiyun 	case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
77*4882a593Smuzhiyun 		/*
78*4882a593Smuzhiyun 		 * Let's try to retrieve the real maximum number of bitflips
79*4882a593Smuzhiyun 		 * in order to avoid forcing the wear-leveling layer to move
80*4882a593Smuzhiyun 		 * data around if it's not necessary.
81*4882a593Smuzhiyun 		 */
82*4882a593Smuzhiyun 		if (spi_mem_exec_op(spinand->slave, &op))
83*4882a593Smuzhiyun 			return nand->eccreq.strength;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 		mbf >>= 4;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 		if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
88*4882a593Smuzhiyun 			return nand->eccreq.strength;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 		return mbf;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	default:
93*4882a593Smuzhiyun 		break;
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	return -EINVAL;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun static const struct spinand_info toshiba_spinand_table[] = {
100*4882a593Smuzhiyun 	/* 3.3V 1Gb */
101*4882a593Smuzhiyun 	SPINAND_INFO("TC58CVG0S3",
102*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
103*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
104*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
105*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
106*4882a593Smuzhiyun 					      &write_cache_variants,
107*4882a593Smuzhiyun 					      &update_cache_variants),
108*4882a593Smuzhiyun 		     0,
109*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
110*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
111*4882a593Smuzhiyun 	/* 3.3V 2Gb */
112*4882a593Smuzhiyun 	SPINAND_INFO("TC58CVG1S3",
113*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
114*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
115*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
116*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
117*4882a593Smuzhiyun 					      &write_cache_variants,
118*4882a593Smuzhiyun 					      &update_cache_variants),
119*4882a593Smuzhiyun 		     0,
120*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
121*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
122*4882a593Smuzhiyun 	/* 3.3V 4Gb */
123*4882a593Smuzhiyun 	SPINAND_INFO("TC58CVG2S0",
124*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
125*4882a593Smuzhiyun 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
126*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
127*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
128*4882a593Smuzhiyun 					      &write_cache_variants,
129*4882a593Smuzhiyun 					      &update_cache_variants),
130*4882a593Smuzhiyun 		     0,
131*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
132*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
133*4882a593Smuzhiyun 	/* 1.8V 1Gb */
134*4882a593Smuzhiyun 	SPINAND_INFO("TC58CYG0S3",
135*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
136*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
137*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
138*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
139*4882a593Smuzhiyun 					      &write_cache_variants,
140*4882a593Smuzhiyun 					      &update_cache_variants),
141*4882a593Smuzhiyun 		     0,
142*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
143*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
144*4882a593Smuzhiyun 	/* 1.8V 2Gb */
145*4882a593Smuzhiyun 	SPINAND_INFO("TC58CYG1S3",
146*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
147*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
148*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
149*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
150*4882a593Smuzhiyun 					      &write_cache_variants,
151*4882a593Smuzhiyun 					      &update_cache_variants),
152*4882a593Smuzhiyun 		     0,
153*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
154*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
155*4882a593Smuzhiyun 	/* 1.8V 4Gb */
156*4882a593Smuzhiyun 	SPINAND_INFO("TC58CYG2S0",
157*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
158*4882a593Smuzhiyun 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
159*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
160*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
161*4882a593Smuzhiyun 					      &write_cache_variants,
162*4882a593Smuzhiyun 					      &update_cache_variants),
163*4882a593Smuzhiyun 		     0,
164*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
165*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
166*4882a593Smuzhiyun 	/* 3.3V 1Gb */
167*4882a593Smuzhiyun 	SPINAND_INFO("TC58CVG0S3HRAIJ",
168*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
169*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
170*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
171*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
172*4882a593Smuzhiyun 					      &write_cache_variants,
173*4882a593Smuzhiyun 					      &update_cache_variants),
174*4882a593Smuzhiyun 		     0,
175*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
176*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
177*4882a593Smuzhiyun 	/* 3.3V 2Gb */
178*4882a593Smuzhiyun 	SPINAND_INFO("TC58CVG1S3HRAIJ",
179*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
180*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
181*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
182*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
183*4882a593Smuzhiyun 					      &write_cache_variants,
184*4882a593Smuzhiyun 					      &update_cache_variants),
185*4882a593Smuzhiyun 		     0,
186*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
187*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
188*4882a593Smuzhiyun 	/* 3.3V 4Gb */
189*4882a593Smuzhiyun 	SPINAND_INFO("TC58CVG2S0HRAIJ",
190*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
191*4882a593Smuzhiyun 		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
192*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
193*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
194*4882a593Smuzhiyun 					      &write_cache_variants,
195*4882a593Smuzhiyun 					      &update_cache_variants),
196*4882a593Smuzhiyun 		     0,
197*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
198*4882a593Smuzhiyun 				     tc58cxgxsx_ecc_get_status)),
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun const struct spinand_manufacturer toshiba_spinand_manufacturer = {
205*4882a593Smuzhiyun 	.id = SPINAND_MFR_TOSHIBA,
206*4882a593Smuzhiyun 	.name = "Toshiba",
207*4882a593Smuzhiyun 	.chips = toshiba_spinand_table,
208*4882a593Smuzhiyun 	.nchips = ARRAY_SIZE(toshiba_spinand_table),
209*4882a593Smuzhiyun 	.ops = &toshiba_spinand_manuf_ops,
210*4882a593Smuzhiyun };
211