xref: /OK3568_Linux_fs/u-boot/drivers/mtd/nand/spi/fmsh.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Authors:
6*4882a593Smuzhiyun  *	Dingqiang Lin <jon.lin@rock-chips.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __UBOOT__
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #endif
13*4882a593Smuzhiyun #include <linux/mtd/spinand.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define SPINAND_MFR_FMSH		0xA1
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(read_cache_variants,
18*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
19*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
20*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
21*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
22*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
23*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(write_cache_variants,
26*4882a593Smuzhiyun 		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
27*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(true, 0, NULL, 0));
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(update_cache_variants,
30*4882a593Smuzhiyun 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
31*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
32*4882a593Smuzhiyun 
fm25s01a_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)33*4882a593Smuzhiyun static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section,
34*4882a593Smuzhiyun 				  struct mtd_oob_region *region)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	return -ERANGE;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
fm25s01a_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)39*4882a593Smuzhiyun static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section,
40*4882a593Smuzhiyun 				   struct mtd_oob_region *region)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	if (section)
43*4882a593Smuzhiyun 		return -ERANGE;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	region->offset = 2;
46*4882a593Smuzhiyun 	region->length = 62;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	return 0;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
52*4882a593Smuzhiyun 	.ecc = fm25s01a_ooblayout_ecc,
53*4882a593Smuzhiyun 	.rfree = fm25s01a_ooblayout_free,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
fm25s01_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)56*4882a593Smuzhiyun static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section,
57*4882a593Smuzhiyun 				 struct mtd_oob_region *region)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	if (section)
60*4882a593Smuzhiyun 		return -ERANGE;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	region->offset = 64;
63*4882a593Smuzhiyun 	region->length = 64;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	return 0;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
fm25s01_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)68*4882a593Smuzhiyun static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section,
69*4882a593Smuzhiyun 				  struct mtd_oob_region *region)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	if (section)
72*4882a593Smuzhiyun 		return -ERANGE;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	region->offset = 2;
75*4882a593Smuzhiyun 	region->length = 62;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	return 0;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static const struct mtd_ooblayout_ops fm25s01_ooblayout = {
81*4882a593Smuzhiyun 	.ecc = fm25s01_ooblayout_ecc,
82*4882a593Smuzhiyun 	.rfree = fm25s01_ooblayout_free,
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun  * ecc bits: 0xC0[4,6]
87*4882a593Smuzhiyun  * [0b000], No bit errors were detected;
88*4882a593Smuzhiyun  * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not
89*4882a593Smuzhiyun  *	reach Flipping Bits;
90*4882a593Smuzhiyun  * [0b101], Bit error count equals the bit flip
91*4882a593Smuzhiyun  *	detection threshold
92*4882a593Smuzhiyun  * [0b010], Multiple bit errors were detected and
93*4882a593Smuzhiyun  *	not corrected.
94*4882a593Smuzhiyun  * others, Reserved.
95*4882a593Smuzhiyun  */
fm25s01bi3_ecc_ecc_get_status(struct spinand_device * spinand,u8 status)96*4882a593Smuzhiyun static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand,
97*4882a593Smuzhiyun 					u8 status)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	struct nand_device *nand = spinand_to_nand(spinand);
100*4882a593Smuzhiyun 	u8 eccsr = (status & GENMASK(6, 4)) >> 4;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	if (eccsr <= 1 || eccsr == 3)
103*4882a593Smuzhiyun 		return eccsr;
104*4882a593Smuzhiyun 	else if (eccsr == 5)
105*4882a593Smuzhiyun 		return nand->eccreq.strength;
106*4882a593Smuzhiyun 	else
107*4882a593Smuzhiyun 		return -EBADMSG;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun static const struct spinand_info fmsh_spinand_table[] = {
111*4882a593Smuzhiyun 	SPINAND_INFO("FM25S01A",
112*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
113*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
114*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
115*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
116*4882a593Smuzhiyun 					      &write_cache_variants,
117*4882a593Smuzhiyun 					      &update_cache_variants),
118*4882a593Smuzhiyun 		     0,
119*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
120*4882a593Smuzhiyun 	SPINAND_INFO("FM25S02A",
121*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5),
122*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
123*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
124*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
125*4882a593Smuzhiyun 					      &write_cache_variants,
126*4882a593Smuzhiyun 					      &update_cache_variants),
127*4882a593Smuzhiyun 		     SPINAND_HAS_QE_BIT,
128*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
129*4882a593Smuzhiyun 	SPINAND_INFO("FM25S01",
130*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
131*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
132*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
133*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
134*4882a593Smuzhiyun 					      &write_cache_variants,
135*4882a593Smuzhiyun 					      &update_cache_variants),
136*4882a593Smuzhiyun 		     0,
137*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
138*4882a593Smuzhiyun 	SPINAND_INFO("FM25LS01",
139*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5),
140*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
141*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
142*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
143*4882a593Smuzhiyun 					      &write_cache_variants,
144*4882a593Smuzhiyun 					      &update_cache_variants),
145*4882a593Smuzhiyun 		     0,
146*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
147*4882a593Smuzhiyun 	SPINAND_INFO("FM25S01BI3",
148*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
149*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
150*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
151*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
152*4882a593Smuzhiyun 					      &write_cache_variants,
153*4882a593Smuzhiyun 					      &update_cache_variants),
154*4882a593Smuzhiyun 		     SPINAND_HAS_QE_BIT,
155*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)),
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun const struct spinand_manufacturer fmsh_spinand_manufacturer = {
162*4882a593Smuzhiyun 	.id = SPINAND_MFR_FMSH,
163*4882a593Smuzhiyun 	.name = "FMSH",
164*4882a593Smuzhiyun 	.chips = fmsh_spinand_table,
165*4882a593Smuzhiyun 	.nchips = ARRAY_SIZE(fmsh_spinand_table),
166*4882a593Smuzhiyun 	.ops = &fmsh_spinand_manuf_ops,
167*4882a593Smuzhiyun };
168