1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2020 Grandstream Networks, Inc
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Authors:
6*4882a593Smuzhiyun * Carl <xjxia@grandstream.cn>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifndef __UBOOT__
10*4882a593Smuzhiyun #include <linux/device.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #endif
13*4882a593Smuzhiyun #include <linux/mtd/spinand.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define SPINAND_MFR_ESMT 0xC8
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(read_cache_variants,
18*4882a593Smuzhiyun SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
19*4882a593Smuzhiyun SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
20*4882a593Smuzhiyun SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
21*4882a593Smuzhiyun SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
22*4882a593Smuzhiyun SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
23*4882a593Smuzhiyun SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(write_cache_variants,
26*4882a593Smuzhiyun SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
27*4882a593Smuzhiyun SPINAND_PROG_LOAD(true, 0, NULL, 0));
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(update_cache_variants,
30*4882a593Smuzhiyun SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
31*4882a593Smuzhiyun SPINAND_PROG_LOAD(false, 0, NULL, 0));
32*4882a593Smuzhiyun
f50lxx41x_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)33*4882a593Smuzhiyun static int f50lxx41x_ooblayout_ecc(struct mtd_info *mtd, int section,
34*4882a593Smuzhiyun struct mtd_oob_region *region)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun if (section > 3)
37*4882a593Smuzhiyun return -ERANGE;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun region->offset = (16 * section) + 8;
40*4882a593Smuzhiyun region->length = 8;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
f50lxx41x_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)45*4882a593Smuzhiyun static int f50lxx41x_ooblayout_free(struct mtd_info *mtd, int section,
46*4882a593Smuzhiyun struct mtd_oob_region *region)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun if (section > 3)
49*4882a593Smuzhiyun return -ERANGE;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun region->offset = (16 * section) + 2;
52*4882a593Smuzhiyun region->length = 6;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static const struct mtd_ooblayout_ops f50lxx41x_ooblayout = {
58*4882a593Smuzhiyun .ecc = f50lxx41x_ooblayout_ecc,
59*4882a593Smuzhiyun .rfree = f50lxx41x_ooblayout_free,
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static const struct spinand_info esmt_spinand_table[] = {
63*4882a593Smuzhiyun SPINAND_INFO("F50L1G41LB",
64*4882a593Smuzhiyun SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x01),
65*4882a593Smuzhiyun NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
66*4882a593Smuzhiyun NAND_ECCREQ(1, 512),
67*4882a593Smuzhiyun SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
68*4882a593Smuzhiyun &write_cache_variants,
69*4882a593Smuzhiyun &update_cache_variants),
70*4882a593Smuzhiyun 0,
71*4882a593Smuzhiyun SPINAND_ECCINFO(&f50lxx41x_ooblayout, NULL)),
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun const struct spinand_manufacturer esmt_spinand_manufacturer = {
78*4882a593Smuzhiyun .id = SPINAND_MFR_ESMT,
79*4882a593Smuzhiyun .name = "esmt",
80*4882a593Smuzhiyun .chips = esmt_spinand_table,
81*4882a593Smuzhiyun .nchips = ARRAY_SIZE(esmt_spinand_table),
82*4882a593Smuzhiyun .ops = &esmt_spinand_manuf_ops,
83*4882a593Smuzhiyun };
84