1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun #ifndef __BRCMNAND_H__
4*4882a593Smuzhiyun #define __BRCMNAND_H__
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/types.h>
7*4882a593Smuzhiyun #include <linux/io.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun struct brcmnand_soc {
10*4882a593Smuzhiyun bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
11*4882a593Smuzhiyun void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
12*4882a593Smuzhiyun void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
13*4882a593Smuzhiyun bool is_param);
14*4882a593Smuzhiyun void *ctrl;
15*4882a593Smuzhiyun };
16*4882a593Smuzhiyun
brcmnand_soc_data_bus_prepare(struct brcmnand_soc * soc,bool is_param)17*4882a593Smuzhiyun static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc,
18*4882a593Smuzhiyun bool is_param)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun if (soc && soc->prepare_data_bus)
21*4882a593Smuzhiyun soc->prepare_data_bus(soc, true, is_param);
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
brcmnand_soc_data_bus_unprepare(struct brcmnand_soc * soc,bool is_param)24*4882a593Smuzhiyun static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc,
25*4882a593Smuzhiyun bool is_param)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun if (soc && soc->prepare_data_bus)
28*4882a593Smuzhiyun soc->prepare_data_bus(soc, false, is_param);
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
brcmnand_readl(void __iomem * addr)31*4882a593Smuzhiyun static inline u32 brcmnand_readl(void __iomem *addr)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun * MIPS endianness is configured by boot strap, which also reverses all
35*4882a593Smuzhiyun * bus endianness (i.e., big-endian CPU + big endian bus ==> native
36*4882a593Smuzhiyun * endian I/O).
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun * Other architectures (e.g., ARM) either do not support big endian, or
39*4882a593Smuzhiyun * else leave I/O in little endian mode.
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_SYS_BIG_ENDIAN))
42*4882a593Smuzhiyun return __raw_readl(addr);
43*4882a593Smuzhiyun else
44*4882a593Smuzhiyun return readl_relaxed(addr);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
brcmnand_writel(u32 val,void __iomem * addr)47*4882a593Smuzhiyun static inline void brcmnand_writel(u32 val, void __iomem *addr)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun /* See brcmnand_readl() comments */
50*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_SYS_BIG_ENDIAN))
51*4882a593Smuzhiyun __raw_writel(val, addr);
52*4882a593Smuzhiyun else
53*4882a593Smuzhiyun writel_relaxed(val, addr);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc);
57*4882a593Smuzhiyun int brcmnand_remove(struct udevice *dev);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #ifndef __UBOOT__
60*4882a593Smuzhiyun extern const struct dev_pm_ops brcmnand_pm_ops;
61*4882a593Smuzhiyun #endif /* __UBOOT__ */
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #endif /* __BRCMNAND_H__ */
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