xref: /OK3568_Linux_fs/u-boot/drivers/mmc/hi6220_dw_mmc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2015 Linaro
3*4882a593Smuzhiyun  * peter.griffin <peter.griffin@linaro.org>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dwmmc.h>
10*4882a593Smuzhiyun #include <malloc.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define	DWMMC_MAX_CH_NUM		4
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define	DWMMC_MAX_FREQ			50000000
16*4882a593Smuzhiyun #define	DWMMC_MIN_FREQ			400000
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /* Source clock is configured to 100MHz by ATF bl1*/
19*4882a593Smuzhiyun #define MMC0_DEFAULT_FREQ		100000000
20*4882a593Smuzhiyun 
hi6220_dwmci_core_init(struct dwmci_host * host,int index)21*4882a593Smuzhiyun static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun 	host->name = "Hisilicon DWMMC";
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	host->dev_index = index;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	/* Add the mmc channel to be registered with mmc core */
28*4882a593Smuzhiyun 	if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
29*4882a593Smuzhiyun 		printf("DWMMC%d registration failed\n", index);
30*4882a593Smuzhiyun 		return -1;
31*4882a593Smuzhiyun 	}
32*4882a593Smuzhiyun 	return 0;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun  * This function adds the mmc channel to be registered with mmc core.
37*4882a593Smuzhiyun  * index -	mmc channel number.
38*4882a593Smuzhiyun  * regbase -	register base address of mmc channel specified in 'index'.
39*4882a593Smuzhiyun  * bus_width -	operating bus width of mmc channel specified in 'index'.
40*4882a593Smuzhiyun  */
hi6220_dwmci_add_port(int index,u32 regbase,int bus_width)41*4882a593Smuzhiyun int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	struct dwmci_host *host = NULL;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	host = calloc(1, sizeof(struct dwmci_host));
46*4882a593Smuzhiyun 	if (!host) {
47*4882a593Smuzhiyun 		pr_err("dwmci_host calloc failed!\n");
48*4882a593Smuzhiyun 		return -ENOMEM;
49*4882a593Smuzhiyun 	}
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	host->ioaddr = (void *)(ulong)regbase;
52*4882a593Smuzhiyun 	host->buswidth = bus_width;
53*4882a593Smuzhiyun 	host->bus_hz = MMC0_DEFAULT_FREQ;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return hi6220_dwmci_core_init(host, index);
56*4882a593Smuzhiyun }
57