1 /*
2 * (C) Copyright 2004 Tundra Semiconductor Corp.
3 * Author: Alex Bounine
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 *
7 * NOTE: This driver should be converted to driver model before June 2017.
8 * Please see doc/driver-model/i2c-howto.txt for instructions.
9 */
10
11 #include <config.h>
12 #include <common.h>
13
14 #include <tsi108.h>
15
16 #if defined(CONFIG_CMD_I2C)
17
18 #define I2C_DELAY 100000
19 #undef DEBUG_I2C
20
21 #ifdef DEBUG_I2C
22 #define DPRINT(x) printf (x)
23 #else
24 #define DPRINT(x)
25 #endif
26
27 /* All functions assume that Tsi108 I2C block is the only master on the bus */
28 /* I2C read helper function */
29
i2c_init(int speed,int slaveaddr)30 void i2c_init(int speed, int slaveaddr)
31 {
32 /*
33 * The TSI108 has a fixed I2C clock rate and doesn't support slave
34 * operation. This function only exists as a stub to fit into the
35 * U-Boot I2C API.
36 */
37 }
38
i2c_read_byte(uint i2c_chan,uchar chip_addr,uint byte_addr,uchar * buffer)39 static int i2c_read_byte (
40 uint i2c_chan, /* I2C channel number: 0 - main, 1 - SDC SPD */
41 uchar chip_addr,/* I2C device address on the bus */
42 uint byte_addr, /* Byte address within I2C device */
43 uchar * buffer /* pointer to data buffer */
44 )
45 {
46 u32 temp;
47 u32 to_count = I2C_DELAY;
48 u32 op_status = TSI108_I2C_TIMEOUT_ERR;
49 u32 chan_offset = TSI108_I2C_OFFSET;
50
51 DPRINT (("I2C read_byte() %d 0x%02x 0x%02x\n",
52 i2c_chan, chip_addr, byte_addr));
53
54 if (0 != i2c_chan)
55 chan_offset = TSI108_I2C_SDRAM_OFFSET;
56
57 /* Check if I2C operation is in progress */
58 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
59
60 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS |
61 I2C_CNTRL2_START))) {
62 /* Set device address and operation (read = 0) */
63 temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) |
64 ((chip_addr >> 3) & 0x0F);
65 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) =
66 temp;
67
68 /* Issue the read command
69 * (at this moment all other parameters are 0
70 * (size = 1 byte, lane = 0)
71 */
72
73 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) =
74 (I2C_CNTRL2_START);
75
76 /* Wait until operation completed */
77 do {
78 /* Read I2C operation status */
79 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
80
81 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) {
82 if (0 == (temp &
83 (I2C_CNTRL2_I2C_CFGERR |
84 I2C_CNTRL2_I2C_TO_ERR))
85 ) {
86 op_status = TSI108_I2C_SUCCESS;
87
88 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE +
89 chan_offset +
90 I2C_RD_DATA);
91
92 *buffer = (u8) (temp & 0xFF);
93 } else {
94 /* report HW error */
95 op_status = TSI108_I2C_IF_ERROR;
96
97 DPRINT (("I2C HW error reported: 0x%02x\n", temp));
98 }
99
100 break;
101 }
102 } while (to_count--);
103 } else {
104 op_status = TSI108_I2C_IF_BUSY;
105
106 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp));
107 }
108
109 DPRINT (("I2C read_byte() status: 0x%02x\n", op_status));
110 return op_status;
111 }
112
113 /*
114 * I2C Read interface as defined in "include/i2c.h" :
115 * chip_addr: I2C chip address, range 0..127
116 * (to read from SPD channel EEPROM use (0xD0 ... 0xD7)
117 * NOTE: The bit 7 in the chip_addr serves as a channel select.
118 * This hack is for enabling "i2c sdram" command on Tsi108 boards
119 * without changes to common code. Used for I2C reads only.
120 * byte_addr: Memory or register address within the chip
121 * alen: Number of bytes to use for addr (typically 1, 2 for larger
122 * memories, 0 for register type devices with only one
123 * register)
124 * buffer: Pointer to destination buffer for data to be read
125 * len: How many bytes to read
126 *
127 * Returns: 0 on success, not 0 on failure
128 */
129
i2c_read(uchar chip_addr,uint byte_addr,int alen,uchar * buffer,int len)130 int i2c_read (uchar chip_addr, uint byte_addr, int alen,
131 uchar * buffer, int len)
132 {
133 u32 op_status = TSI108_I2C_PARAM_ERR;
134 u32 i2c_if = 0;
135
136 /* Hack to support second (SPD) I2C controller (SPD EEPROM read only).*/
137 if (0xD0 == (chip_addr & ~0x07)) {
138 i2c_if = 1;
139 chip_addr &= 0x7F;
140 }
141 /* Check for valid I2C address */
142 if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
143 while (len--) {
144 op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++);
145
146 if (TSI108_I2C_SUCCESS != op_status) {
147 DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len));
148
149 break;
150 }
151 }
152 }
153
154 DPRINT (("I2C read() status: 0x%02x\n", op_status));
155 return op_status;
156 }
157
158 /* I2C write helper function */
159
i2c_write_byte(uchar chip_addr,uint byte_addr,uchar * buffer)160 static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
161 uint byte_addr, /* Byte address within I2C device */
162 uchar * buffer /* pointer to data buffer */
163 )
164 {
165 u32 temp;
166 u32 to_count = I2C_DELAY;
167 u32 op_status = TSI108_I2C_TIMEOUT_ERR;
168
169 /* Check if I2C operation is in progress */
170 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
171
172 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
173 /* Place data into the I2C Tx Register */
174 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
175 I2C_TX_DATA) = (u32) * buffer;
176
177 /* Set device address and operation */
178 temp =
179 I2C_CNTRL1_I2CWRITE | (byte_addr << 16) |
180 ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F);
181 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
182 I2C_CNTRL1) = temp;
183
184 /* Issue the write command (at this moment all other parameters
185 * are 0 (size = 1 byte, lane = 0)
186 */
187
188 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
189 I2C_CNTRL2) = (I2C_CNTRL2_START);
190
191 op_status = TSI108_I2C_TIMEOUT_ERR;
192
193 /* Wait until operation completed */
194 do {
195 /* Read I2C operation status */
196 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
197
198 if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
199 if (0 == (temp &
200 (I2C_CNTRL2_I2C_CFGERR |
201 I2C_CNTRL2_I2C_TO_ERR))) {
202 op_status = TSI108_I2C_SUCCESS;
203 } else {
204 /* report detected HW error */
205 op_status = TSI108_I2C_IF_ERROR;
206
207 DPRINT (("I2C HW error reported: 0x%02x\n", temp));
208 }
209
210 break;
211 }
212
213 } while (to_count--);
214 } else {
215 op_status = TSI108_I2C_IF_BUSY;
216
217 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp));
218 }
219
220 return op_status;
221 }
222
223 /*
224 * I2C Write interface as defined in "include/i2c.h" :
225 * chip_addr: I2C chip address, range 0..127
226 * byte_addr: Memory or register address within the chip
227 * alen: Number of bytes to use for addr (typically 1, 2 for larger
228 * memories, 0 for register type devices with only one
229 * register)
230 * buffer: Pointer to data to be written
231 * len: How many bytes to write
232 *
233 * Returns: 0 on success, not 0 on failure
234 */
235
i2c_write(uchar chip_addr,uint byte_addr,int alen,uchar * buffer,int len)236 int i2c_write (uchar chip_addr, uint byte_addr, int alen, uchar * buffer,
237 int len)
238 {
239 u32 op_status = TSI108_I2C_PARAM_ERR;
240
241 /* Check for valid I2C address */
242 if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
243 while (len--) {
244 op_status =
245 i2c_write_byte (chip_addr, byte_addr++, buffer++);
246
247 if (TSI108_I2C_SUCCESS != op_status) {
248 DPRINT (("I2C write_byte() failed: 0x%02x (%d left)\n", op_status, len));
249
250 break;
251 }
252 }
253 }
254
255 return op_status;
256 }
257
258 /*
259 * I2C interface function as defined in "include/i2c.h".
260 * Probe the given I2C chip address by reading single byte from offset 0.
261 * Returns 0 if a chip responded, not 0 on failure.
262 */
263
i2c_probe(uchar chip)264 int i2c_probe (uchar chip)
265 {
266 u32 tmp;
267
268 /*
269 * Try to read the first location of the chip.
270 * The Tsi108 HW doesn't support sending just the chip address
271 * and checkong for an <ACK> back.
272 */
273 return i2c_read (chip, 0, 1, (uchar *)&tmp, 1);
274 }
275
276 #endif
277