1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 2012
5*4882a593Smuzhiyun * Heiko Schocher, DENX Software Engineering, hs@denx.de.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Multibus/multiadapter I2C core functions (wrappers)
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun
i2c_get_adapter(int index)14*4882a593Smuzhiyun struct i2c_adapter *i2c_get_adapter(int index)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun struct i2c_adapter *i2c_adap_p = ll_entry_start(struct i2c_adapter,
17*4882a593Smuzhiyun i2c);
18*4882a593Smuzhiyun int max = ll_entry_count(struct i2c_adapter, i2c);
19*4882a593Smuzhiyun int i;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun if (index >= max) {
22*4882a593Smuzhiyun printf("Error, wrong i2c adapter %d max %d possible\n",
23*4882a593Smuzhiyun index, max);
24*4882a593Smuzhiyun return i2c_adap_p;
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun if (index == 0)
27*4882a593Smuzhiyun return i2c_adap_p;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun for (i = 0; i < index; i++)
30*4882a593Smuzhiyun i2c_adap_p++;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun return i2c_adap_p;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #if !defined(CONFIG_SYS_I2C_DIRECT_BUS)
36*4882a593Smuzhiyun struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] =
37*4882a593Smuzhiyun CONFIG_SYS_I2C_BUSES;
38*4882a593Smuzhiyun #endif
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #ifndef CONFIG_SYS_I2C_DIRECT_BUS
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun * i2c_mux_set()
45*4882a593Smuzhiyun * -------------
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun * This turns on the given channel on I2C multiplexer chip connected to
48*4882a593Smuzhiyun * a given I2C adapter directly or via other multiplexers. In the latter
49*4882a593Smuzhiyun * case the entire multiplexer chain must be initialized first starting
50*4882a593Smuzhiyun * with the one connected directly to the adapter. When disabling a chain
51*4882a593Smuzhiyun * muxes must be programmed in reverse order, starting with the one
52*4882a593Smuzhiyun * farthest from the adapter.
53*4882a593Smuzhiyun *
54*4882a593Smuzhiyun * mux_id is the multiplexer chip type from defined in i2c.h. So far only
55*4882a593Smuzhiyun * NXP (Philips) PCA954x multiplexers are supported. Switches are NOT
56*4882a593Smuzhiyun * supported (anybody uses them?)
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun
i2c_mux_set(struct i2c_adapter * adap,int mux_id,int chip,int channel)59*4882a593Smuzhiyun static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip,
60*4882a593Smuzhiyun int channel)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun uint8_t buf;
63*4882a593Smuzhiyun int ret;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* channel < 0 - turn off the mux */
66*4882a593Smuzhiyun if (channel < 0) {
67*4882a593Smuzhiyun buf = 0;
68*4882a593Smuzhiyun ret = adap->write(adap, chip, 0, 0, &buf, 1);
69*4882a593Smuzhiyun if (ret)
70*4882a593Smuzhiyun printf("%s: Could not turn off the mux.\n", __func__);
71*4882a593Smuzhiyun return ret;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun switch (mux_id) {
75*4882a593Smuzhiyun case I2C_MUX_PCA9540_ID:
76*4882a593Smuzhiyun case I2C_MUX_PCA9542_ID:
77*4882a593Smuzhiyun if (channel > 1)
78*4882a593Smuzhiyun return -1;
79*4882a593Smuzhiyun buf = (uint8_t)((channel & 0x01) | (1 << 2));
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun case I2C_MUX_PCA9544_ID:
82*4882a593Smuzhiyun if (channel > 3)
83*4882a593Smuzhiyun return -1;
84*4882a593Smuzhiyun buf = (uint8_t)((channel & 0x03) | (1 << 2));
85*4882a593Smuzhiyun break;
86*4882a593Smuzhiyun case I2C_MUX_PCA9547_ID:
87*4882a593Smuzhiyun if (channel > 7)
88*4882a593Smuzhiyun return -1;
89*4882a593Smuzhiyun buf = (uint8_t)((channel & 0x07) | (1 << 3));
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun case I2C_MUX_PCA9548_ID:
92*4882a593Smuzhiyun if (channel > 7)
93*4882a593Smuzhiyun return -1;
94*4882a593Smuzhiyun buf = (uint8_t)(0x01 << channel);
95*4882a593Smuzhiyun break;
96*4882a593Smuzhiyun default:
97*4882a593Smuzhiyun printf("%s: wrong mux id: %d\n", __func__, mux_id);
98*4882a593Smuzhiyun return -1;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun ret = adap->write(adap, chip, 0, 0, &buf, 1);
102*4882a593Smuzhiyun if (ret)
103*4882a593Smuzhiyun printf("%s: could not set mux: id: %d chip: %x channel: %d\n",
104*4882a593Smuzhiyun __func__, mux_id, chip, channel);
105*4882a593Smuzhiyun return ret;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
i2c_mux_set_all(void)108*4882a593Smuzhiyun static int i2c_mux_set_all(void)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
111*4882a593Smuzhiyun int i;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* Connect requested bus if behind muxes */
114*4882a593Smuzhiyun if (i2c_bus_tmp->next_hop[0].chip != 0) {
115*4882a593Smuzhiyun /* Set all muxes along the path to that bus */
116*4882a593Smuzhiyun for (i = 0; i < CONFIG_SYS_I2C_MAX_HOPS; i++) {
117*4882a593Smuzhiyun int ret;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (i2c_bus_tmp->next_hop[i].chip == 0)
120*4882a593Smuzhiyun break;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun ret = i2c_mux_set(I2C_ADAP,
123*4882a593Smuzhiyun i2c_bus_tmp->next_hop[i].mux.id,
124*4882a593Smuzhiyun i2c_bus_tmp->next_hop[i].chip,
125*4882a593Smuzhiyun i2c_bus_tmp->next_hop[i].channel);
126*4882a593Smuzhiyun if (ret != 0)
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
i2c_mux_disconnect_all(void)133*4882a593Smuzhiyun static int i2c_mux_disconnect_all(void)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
136*4882a593Smuzhiyun int i;
137*4882a593Smuzhiyun uint8_t buf = 0;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (I2C_ADAP->init_done == 0)
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun /* Disconnect current bus (turn off muxes if any) */
143*4882a593Smuzhiyun if ((i2c_bus_tmp->next_hop[0].chip != 0) &&
144*4882a593Smuzhiyun (I2C_ADAP->init_done != 0)) {
145*4882a593Smuzhiyun i = CONFIG_SYS_I2C_MAX_HOPS;
146*4882a593Smuzhiyun do {
147*4882a593Smuzhiyun uint8_t chip;
148*4882a593Smuzhiyun int ret;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun chip = i2c_bus_tmp->next_hop[--i].chip;
151*4882a593Smuzhiyun if (chip == 0)
152*4882a593Smuzhiyun continue;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1);
155*4882a593Smuzhiyun if (ret != 0) {
156*4882a593Smuzhiyun printf("i2c: mux disconnect error\n");
157*4882a593Smuzhiyun return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun } while (i > 0);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return 0;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun #endif
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /*
167*4882a593Smuzhiyun * i2c_init_bus():
168*4882a593Smuzhiyun * ---------------
169*4882a593Smuzhiyun *
170*4882a593Smuzhiyun * Initializes one bus. Will initialize the parent adapter. No current bus
171*4882a593Smuzhiyun * changes, no mux (if any) setup.
172*4882a593Smuzhiyun */
i2c_init_bus(unsigned int bus_no,int speed,int slaveaddr)173*4882a593Smuzhiyun static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES)
176*4882a593Smuzhiyun return;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun I2C_ADAP->init(I2C_ADAP, speed, slaveaddr);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (gd->flags & GD_FLG_RELOC) {
181*4882a593Smuzhiyun I2C_ADAP->init_done = 1;
182*4882a593Smuzhiyun I2C_ADAP->speed = speed;
183*4882a593Smuzhiyun I2C_ADAP->slaveaddr = slaveaddr;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* implement possible board specific board init */
i2c_init_board(void)188*4882a593Smuzhiyun __weak void i2c_init_board(void)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* implement possible for i2c specific early i2c init */
i2c_early_init_f(void)193*4882a593Smuzhiyun __weak void i2c_early_init_f(void)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /*
198*4882a593Smuzhiyun * i2c_init_all():
199*4882a593Smuzhiyun *
200*4882a593Smuzhiyun * not longer needed, will deleted. Actual init the SPD_BUS
201*4882a593Smuzhiyun * for compatibility.
202*4882a593Smuzhiyun * i2c_adap[] must be initialized beforehead with function pointers and
203*4882a593Smuzhiyun * data, including speed and slaveaddr.
204*4882a593Smuzhiyun */
i2c_init_all(void)205*4882a593Smuzhiyun void i2c_init_all(void)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun i2c_init_board();
208*4882a593Smuzhiyun i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
209*4882a593Smuzhiyun return;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /*
213*4882a593Smuzhiyun * i2c_get_bus_num():
214*4882a593Smuzhiyun * ------------------
215*4882a593Smuzhiyun *
216*4882a593Smuzhiyun * Returns index of currently active I2C bus. Zero-based.
217*4882a593Smuzhiyun */
i2c_get_bus_num(void)218*4882a593Smuzhiyun unsigned int i2c_get_bus_num(void)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun return gd->cur_i2c_bus;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /*
224*4882a593Smuzhiyun * i2c_set_bus_num():
225*4882a593Smuzhiyun * ------------------
226*4882a593Smuzhiyun *
227*4882a593Smuzhiyun * Change the active I2C bus. Subsequent read/write calls will
228*4882a593Smuzhiyun * go to this one. Sets all of the muxes in a proper condition
229*4882a593Smuzhiyun * if that bus is behind muxes.
230*4882a593Smuzhiyun * If previously selected bus is behind the muxes turns off all the
231*4882a593Smuzhiyun * muxes along the path to that bus.
232*4882a593Smuzhiyun *
233*4882a593Smuzhiyun * bus - bus index, zero based
234*4882a593Smuzhiyun *
235*4882a593Smuzhiyun * Returns: 0 on success, not 0 on failure
236*4882a593Smuzhiyun */
i2c_set_bus_num(unsigned int bus)237*4882a593Smuzhiyun int i2c_set_bus_num(unsigned int bus)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun int max;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
242*4882a593Smuzhiyun return 0;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #ifndef CONFIG_SYS_I2C_DIRECT_BUS
245*4882a593Smuzhiyun if (bus >= CONFIG_SYS_NUM_I2C_BUSES)
246*4882a593Smuzhiyun return -1;
247*4882a593Smuzhiyun #endif
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun max = ll_entry_count(struct i2c_adapter, i2c);
250*4882a593Smuzhiyun if (I2C_ADAPTER(bus) >= max) {
251*4882a593Smuzhiyun printf("Error, wrong i2c adapter %d max %d possible\n",
252*4882a593Smuzhiyun I2C_ADAPTER(bus), max);
253*4882a593Smuzhiyun return -2;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun #ifndef CONFIG_SYS_I2C_DIRECT_BUS
257*4882a593Smuzhiyun i2c_mux_disconnect_all();
258*4882a593Smuzhiyun #endif
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun gd->cur_i2c_bus = bus;
261*4882a593Smuzhiyun if (I2C_ADAP->init_done == 0)
262*4882a593Smuzhiyun i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun #ifndef CONFIG_SYS_I2C_DIRECT_BUS
265*4882a593Smuzhiyun i2c_mux_set_all();
266*4882a593Smuzhiyun #endif
267*4882a593Smuzhiyun return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /*
271*4882a593Smuzhiyun * Probe the given I2C chip address. Returns 0 if a chip responded,
272*4882a593Smuzhiyun * not 0 on failure.
273*4882a593Smuzhiyun */
i2c_probe(uint8_t chip)274*4882a593Smuzhiyun int i2c_probe(uint8_t chip)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun return I2C_ADAP->probe(I2C_ADAP, chip);
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /*
280*4882a593Smuzhiyun * Read/Write interface:
281*4882a593Smuzhiyun * chip: I2C chip address, range 0..127
282*4882a593Smuzhiyun * addr: Memory (register) address within the chip
283*4882a593Smuzhiyun * alen: Number of bytes to use for addr (typically 1, 2 for larger
284*4882a593Smuzhiyun * memories, 0 for register type devices with only one
285*4882a593Smuzhiyun * register)
286*4882a593Smuzhiyun * buffer: Where to read/write the data
287*4882a593Smuzhiyun * len: How many bytes to read/write
288*4882a593Smuzhiyun *
289*4882a593Smuzhiyun * Returns: 0 on success, not 0 on failure
290*4882a593Smuzhiyun */
i2c_read(uint8_t chip,unsigned int addr,int alen,uint8_t * buffer,int len)291*4882a593Smuzhiyun int i2c_read(uint8_t chip, unsigned int addr, int alen,
292*4882a593Smuzhiyun uint8_t *buffer, int len)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun return I2C_ADAP->read(I2C_ADAP, chip, addr, alen, buffer, len);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
i2c_write(uint8_t chip,unsigned int addr,int alen,uint8_t * buffer,int len)297*4882a593Smuzhiyun int i2c_write(uint8_t chip, unsigned int addr, int alen,
298*4882a593Smuzhiyun uint8_t *buffer, int len)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun return I2C_ADAP->write(I2C_ADAP, chip, addr, alen, buffer, len);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
i2c_set_bus_speed(unsigned int speed)303*4882a593Smuzhiyun unsigned int i2c_set_bus_speed(unsigned int speed)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun unsigned int ret;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun if (I2C_ADAP->set_bus_speed == NULL)
308*4882a593Smuzhiyun return 0;
309*4882a593Smuzhiyun ret = I2C_ADAP->set_bus_speed(I2C_ADAP, speed);
310*4882a593Smuzhiyun if (gd->flags & GD_FLG_RELOC)
311*4882a593Smuzhiyun I2C_ADAP->speed = (ret == 0) ? speed : 0;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun return ret;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
i2c_get_bus_speed(void)316*4882a593Smuzhiyun unsigned int i2c_get_bus_speed(void)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun struct i2c_adapter *cur = I2C_ADAP;
319*4882a593Smuzhiyun return cur->speed;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
i2c_reg_read(uint8_t addr,uint8_t reg)322*4882a593Smuzhiyun uint8_t i2c_reg_read(uint8_t addr, uint8_t reg)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun uint8_t buf;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun i2c_read(addr, reg, 1, &buf, 1);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun #ifdef DEBUG
329*4882a593Smuzhiyun printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x\n",
330*4882a593Smuzhiyun __func__, i2c_get_bus_num(), addr, reg, buf);
331*4882a593Smuzhiyun #endif
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun return buf;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
i2c_reg_write(uint8_t addr,uint8_t reg,uint8_t val)336*4882a593Smuzhiyun void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun #ifdef DEBUG
339*4882a593Smuzhiyun printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x\n",
340*4882a593Smuzhiyun __func__, i2c_get_bus_num(), addr, reg, val);
341*4882a593Smuzhiyun #endif
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun i2c_write(addr, reg, 1, &val, 1);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
i2c_init(int speed,int slaveaddr)346*4882a593Smuzhiyun __weak void i2c_init(int speed, int slaveaddr)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun i2c_init_bus(i2c_get_bus_num(), speed, slaveaddr);
349*4882a593Smuzhiyun }
350