xref: /OK3568_Linux_fs/u-boot/drivers/gpio/spear_gpio.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2012 Stefan Roese <sr@denx.de>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun /*
8*4882a593Smuzhiyun  * Driver for SPEAr600 GPIO controller
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <asm/arch/hardware.h>
13*4882a593Smuzhiyun #include <asm/gpio.h>
14*4882a593Smuzhiyun #include <asm/io.h>
15*4882a593Smuzhiyun #include <errno.h>
16*4882a593Smuzhiyun 
gpio_direction(unsigned gpio,enum gpio_direction direction)17*4882a593Smuzhiyun static int gpio_direction(unsigned gpio,
18*4882a593Smuzhiyun 			  enum gpio_direction direction)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
21*4882a593Smuzhiyun 	u32 val;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 	val = readl(&regs->gpiodir);
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	if (direction == GPIO_DIRECTION_OUT)
26*4882a593Smuzhiyun 		val |= 1 << gpio;
27*4882a593Smuzhiyun 	else
28*4882a593Smuzhiyun 		val &= ~(1 << gpio);
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	writel(val, &regs->gpiodir);
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	return 0;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
gpio_set_value(unsigned gpio,int value)35*4882a593Smuzhiyun int gpio_set_value(unsigned gpio, int value)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	if (value)
40*4882a593Smuzhiyun 		writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
41*4882a593Smuzhiyun 	else
42*4882a593Smuzhiyun 		writel(0, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	return 0;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun 
gpio_get_value(unsigned gpio)47*4882a593Smuzhiyun int gpio_get_value(unsigned gpio)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
50*4882a593Smuzhiyun 	u32 val;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	val = readl(&regs->gpiodata[DATA_REG_ADDR(gpio)]);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	return !!val;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
gpio_request(unsigned gpio,const char * label)57*4882a593Smuzhiyun int gpio_request(unsigned gpio, const char *label)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	if (gpio >= SPEAR_GPIO_COUNT)
60*4882a593Smuzhiyun 		return -EINVAL;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	return 0;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
gpio_free(unsigned gpio)65*4882a593Smuzhiyun int gpio_free(unsigned gpio)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	return 0;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
gpio_toggle_value(unsigned gpio)70*4882a593Smuzhiyun void gpio_toggle_value(unsigned gpio)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	gpio_set_value(gpio, !gpio_get_value(gpio));
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
gpio_direction_input(unsigned gpio)75*4882a593Smuzhiyun int gpio_direction_input(unsigned gpio)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	return gpio_direction(gpio, GPIO_DIRECTION_IN);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
gpio_direction_output(unsigned gpio,int value)80*4882a593Smuzhiyun int gpio_direction_output(unsigned gpio, int value)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	int ret = gpio_direction(gpio, GPIO_DIRECTION_OUT);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	if (ret < 0)
85*4882a593Smuzhiyun 		return ret;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	gpio_set_value(gpio, value);
88*4882a593Smuzhiyun 	return 0;
89*4882a593Smuzhiyun }
90