1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2011
3*4882a593Smuzhiyun * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * Driver for NXP's pca9698 40 bit I2C gpio expander
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <i2c.h>
14*4882a593Smuzhiyun #include <linux/errno.h>
15*4882a593Smuzhiyun #include <pca9698.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun * The pca9698 registers
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define PCA9698_REG_INPUT 0x00
22*4882a593Smuzhiyun #define PCA9698_REG_OUTPUT 0x08
23*4882a593Smuzhiyun #define PCA9698_REG_POLARITY 0x10
24*4882a593Smuzhiyun #define PCA9698_REG_CONFIG 0x18
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define PCA9698_BUFFER_SIZE 5
27*4882a593Smuzhiyun #define PCA9698_GPIO_COUNT 40
28*4882a593Smuzhiyun
pca9698_read40(u8 addr,u8 offset,u8 * buffer)29*4882a593Smuzhiyun static int pca9698_read40(u8 addr, u8 offset, u8 *buffer)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun u8 command = offset | 0x80; /* autoincrement */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return i2c_read(addr, command, 1, buffer, PCA9698_BUFFER_SIZE);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
pca9698_write40(u8 addr,u8 offset,u8 * buffer)36*4882a593Smuzhiyun static int pca9698_write40(u8 addr, u8 offset, u8 *buffer)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun u8 command = offset | 0x80; /* autoincrement */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return i2c_write(addr, command, 1, buffer, PCA9698_BUFFER_SIZE);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
pca9698_set_bit(unsigned gpio,u8 * buffer,unsigned value)43*4882a593Smuzhiyun static void pca9698_set_bit(unsigned gpio, u8 *buffer, unsigned value)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun unsigned byte = gpio / 8;
46*4882a593Smuzhiyun unsigned bit = gpio % 8;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (value)
49*4882a593Smuzhiyun buffer[byte] |= (1 << bit);
50*4882a593Smuzhiyun else
51*4882a593Smuzhiyun buffer[byte] &= ~(1 << bit);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
pca9698_request(unsigned gpio,const char * label)54*4882a593Smuzhiyun int pca9698_request(unsigned gpio, const char *label)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun if (gpio >= PCA9698_GPIO_COUNT)
57*4882a593Smuzhiyun return -EINVAL;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
pca9698_free(unsigned gpio)62*4882a593Smuzhiyun void pca9698_free(unsigned gpio)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
pca9698_direction_input(u8 addr,unsigned gpio)66*4882a593Smuzhiyun int pca9698_direction_input(u8 addr, unsigned gpio)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun u8 data[PCA9698_BUFFER_SIZE];
69*4882a593Smuzhiyun int res;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun res = pca9698_read40(addr, PCA9698_REG_CONFIG, data);
72*4882a593Smuzhiyun if (res)
73*4882a593Smuzhiyun return res;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun pca9698_set_bit(gpio, data, 1);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return pca9698_write40(addr, PCA9698_REG_CONFIG, data);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
pca9698_direction_output(u8 addr,unsigned gpio,int value)80*4882a593Smuzhiyun int pca9698_direction_output(u8 addr, unsigned gpio, int value)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun u8 data[PCA9698_BUFFER_SIZE];
83*4882a593Smuzhiyun int res;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun res = pca9698_set_value(addr, gpio, value);
86*4882a593Smuzhiyun if (res)
87*4882a593Smuzhiyun return res;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun res = pca9698_read40(addr, PCA9698_REG_CONFIG, data);
90*4882a593Smuzhiyun if (res)
91*4882a593Smuzhiyun return res;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun pca9698_set_bit(gpio, data, 0);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return pca9698_write40(addr, PCA9698_REG_CONFIG, data);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
pca9698_get_value(u8 addr,unsigned gpio)98*4882a593Smuzhiyun int pca9698_get_value(u8 addr, unsigned gpio)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun unsigned config_byte = gpio / 8;
101*4882a593Smuzhiyun unsigned config_bit = gpio % 8;
102*4882a593Smuzhiyun unsigned value;
103*4882a593Smuzhiyun u8 data[PCA9698_BUFFER_SIZE];
104*4882a593Smuzhiyun int res;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun res = pca9698_read40(addr, PCA9698_REG_INPUT, data);
107*4882a593Smuzhiyun if (res)
108*4882a593Smuzhiyun return -1;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun value = data[config_byte] & (1 << config_bit);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return !!value;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
pca9698_set_value(u8 addr,unsigned gpio,int value)115*4882a593Smuzhiyun int pca9698_set_value(u8 addr, unsigned gpio, int value)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun u8 data[PCA9698_BUFFER_SIZE];
118*4882a593Smuzhiyun int res;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun res = pca9698_read40(addr, PCA9698_REG_OUTPUT, data);
121*4882a593Smuzhiyun if (res)
122*4882a593Smuzhiyun return res;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun pca9698_set_bit(gpio, data, value);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun return pca9698_write40(addr, PCA9698_REG_OUTPUT, data);
127*4882a593Smuzhiyun }
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