xref: /OK3568_Linux_fs/u-boot/drivers/gpio/omap_gpio.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2009 Wind River Systems, Inc.
3*4882a593Smuzhiyun  * Tom Rix <Tom.Rix@windriver.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This work is derived from the linux 2.6.27 kernel source
8*4882a593Smuzhiyun  * To fetch, use the kernel repository
9*4882a593Smuzhiyun  * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
10*4882a593Smuzhiyun  * Use the v2.6.27 tag.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Below is the original's header including its copyright
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *  linux/arch/arm/plat-omap/gpio.c
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * Support functions for OMAP GPIO
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Copyright (C) 2003-2005 Nokia Corporation
19*4882a593Smuzhiyun  * Written by Juha Yrjölä <juha.yrjola@nokia.com>
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun #include <common.h>
22*4882a593Smuzhiyun #include <dm.h>
23*4882a593Smuzhiyun #include <fdtdec.h>
24*4882a593Smuzhiyun #include <asm/gpio.h>
25*4882a593Smuzhiyun #include <asm/io.h>
26*4882a593Smuzhiyun #include <linux/errno.h>
27*4882a593Smuzhiyun #include <malloc.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define OMAP_GPIO_DIR_OUT	0
32*4882a593Smuzhiyun #define OMAP_GPIO_DIR_IN	1
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #ifdef CONFIG_DM_GPIO
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define GPIO_PER_BANK			32
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun struct gpio_bank {
39*4882a593Smuzhiyun 	/* TODO(sjg@chromium.org): Can we use a struct here? */
40*4882a593Smuzhiyun 	void *base;	/* address of registers in physical memory */
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #endif
44*4882a593Smuzhiyun 
get_gpio_index(int gpio)45*4882a593Smuzhiyun static inline int get_gpio_index(int gpio)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	return gpio & 0x1f;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
gpio_is_valid(int gpio)50*4882a593Smuzhiyun int gpio_is_valid(int gpio)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	return (gpio >= 0) && (gpio < OMAP_MAX_GPIO);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
_set_gpio_direction(const struct gpio_bank * bank,int gpio,int is_input)55*4882a593Smuzhiyun static void _set_gpio_direction(const struct gpio_bank *bank, int gpio,
56*4882a593Smuzhiyun 				int is_input)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	void *reg = bank->base;
59*4882a593Smuzhiyun 	u32 l;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	reg += OMAP_GPIO_OE;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	l = __raw_readl(reg);
64*4882a593Smuzhiyun 	if (is_input)
65*4882a593Smuzhiyun 		l |= 1 << gpio;
66*4882a593Smuzhiyun 	else
67*4882a593Smuzhiyun 		l &= ~(1 << gpio);
68*4882a593Smuzhiyun 	__raw_writel(l, reg);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /**
72*4882a593Smuzhiyun  * Get the direction of the GPIO by reading the GPIO_OE register
73*4882a593Smuzhiyun  * corresponding to the specified bank.
74*4882a593Smuzhiyun  */
_get_gpio_direction(const struct gpio_bank * bank,int gpio)75*4882a593Smuzhiyun static int _get_gpio_direction(const struct gpio_bank *bank, int gpio)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	void *reg = bank->base;
78*4882a593Smuzhiyun 	u32 v;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	reg += OMAP_GPIO_OE;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	v = __raw_readl(reg);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	if (v & (1 << gpio))
85*4882a593Smuzhiyun 		return OMAP_GPIO_DIR_IN;
86*4882a593Smuzhiyun 	else
87*4882a593Smuzhiyun 		return OMAP_GPIO_DIR_OUT;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun 
_set_gpio_dataout(const struct gpio_bank * bank,int gpio,int enable)90*4882a593Smuzhiyun static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio,
91*4882a593Smuzhiyun 				int enable)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	void *reg = bank->base;
94*4882a593Smuzhiyun 	u32 l = 0;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	if (enable)
97*4882a593Smuzhiyun 		reg += OMAP_GPIO_SETDATAOUT;
98*4882a593Smuzhiyun 	else
99*4882a593Smuzhiyun 		reg += OMAP_GPIO_CLEARDATAOUT;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	l = 1 << gpio;
102*4882a593Smuzhiyun 	__raw_writel(l, reg);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
_get_gpio_value(const struct gpio_bank * bank,int gpio)105*4882a593Smuzhiyun static int _get_gpio_value(const struct gpio_bank *bank, int gpio)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	void *reg = bank->base;
108*4882a593Smuzhiyun 	int input;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	input = _get_gpio_direction(bank, gpio);
111*4882a593Smuzhiyun 	switch (input) {
112*4882a593Smuzhiyun 	case OMAP_GPIO_DIR_IN:
113*4882a593Smuzhiyun 		reg += OMAP_GPIO_DATAIN;
114*4882a593Smuzhiyun 		break;
115*4882a593Smuzhiyun 	case OMAP_GPIO_DIR_OUT:
116*4882a593Smuzhiyun 		reg += OMAP_GPIO_DATAOUT;
117*4882a593Smuzhiyun 		break;
118*4882a593Smuzhiyun 	default:
119*4882a593Smuzhiyun 		return -1;
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return (__raw_readl(reg) & (1 << gpio)) != 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #ifndef CONFIG_DM_GPIO
126*4882a593Smuzhiyun 
get_gpio_bank(int gpio)127*4882a593Smuzhiyun static inline const struct gpio_bank *get_gpio_bank(int gpio)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun 	return &omap_gpio_bank[gpio >> 5];
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
check_gpio(int gpio)132*4882a593Smuzhiyun static int check_gpio(int gpio)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	if (!gpio_is_valid(gpio)) {
135*4882a593Smuzhiyun 		printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
136*4882a593Smuzhiyun 		return -1;
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun 	return 0;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /**
142*4882a593Smuzhiyun  * Set value of the specified gpio
143*4882a593Smuzhiyun  */
gpio_set_value(unsigned gpio,int value)144*4882a593Smuzhiyun int gpio_set_value(unsigned gpio, int value)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun 	const struct gpio_bank *bank;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	if (check_gpio(gpio) < 0)
149*4882a593Smuzhiyun 		return -1;
150*4882a593Smuzhiyun 	bank = get_gpio_bank(gpio);
151*4882a593Smuzhiyun 	_set_gpio_dataout(bank, get_gpio_index(gpio), value);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun /**
157*4882a593Smuzhiyun  * Get value of the specified gpio
158*4882a593Smuzhiyun  */
gpio_get_value(unsigned gpio)159*4882a593Smuzhiyun int gpio_get_value(unsigned gpio)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	const struct gpio_bank *bank;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if (check_gpio(gpio) < 0)
164*4882a593Smuzhiyun 		return -1;
165*4882a593Smuzhiyun 	bank = get_gpio_bank(gpio);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	return _get_gpio_value(bank, get_gpio_index(gpio));
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun /**
171*4882a593Smuzhiyun  * Set gpio direction as input
172*4882a593Smuzhiyun  */
gpio_direction_input(unsigned gpio)173*4882a593Smuzhiyun int gpio_direction_input(unsigned gpio)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	const struct gpio_bank *bank;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	if (check_gpio(gpio) < 0)
178*4882a593Smuzhiyun 		return -1;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	bank = get_gpio_bank(gpio);
181*4882a593Smuzhiyun 	_set_gpio_direction(bank, get_gpio_index(gpio), 1);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return 0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun /**
187*4882a593Smuzhiyun  * Set gpio direction as output
188*4882a593Smuzhiyun  */
gpio_direction_output(unsigned gpio,int value)189*4882a593Smuzhiyun int gpio_direction_output(unsigned gpio, int value)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	const struct gpio_bank *bank;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	if (check_gpio(gpio) < 0)
194*4882a593Smuzhiyun 		return -1;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	bank = get_gpio_bank(gpio);
197*4882a593Smuzhiyun 	_set_gpio_dataout(bank, get_gpio_index(gpio), value);
198*4882a593Smuzhiyun 	_set_gpio_direction(bank, get_gpio_index(gpio), 0);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun /**
204*4882a593Smuzhiyun  * Request a gpio before using it.
205*4882a593Smuzhiyun  *
206*4882a593Smuzhiyun  * NOTE: Argument 'label' is unused.
207*4882a593Smuzhiyun  */
gpio_request(unsigned gpio,const char * label)208*4882a593Smuzhiyun int gpio_request(unsigned gpio, const char *label)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	if (check_gpio(gpio) < 0)
211*4882a593Smuzhiyun 		return -1;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun /**
217*4882a593Smuzhiyun  * Reset and free the gpio after using it.
218*4882a593Smuzhiyun  */
gpio_free(unsigned gpio)219*4882a593Smuzhiyun int gpio_free(unsigned gpio)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	return 0;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun #else /* new driver model interface CONFIG_DM_GPIO */
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun /* set GPIO pin 'gpio' as an input */
omap_gpio_direction_input(struct udevice * dev,unsigned offset)227*4882a593Smuzhiyun static int omap_gpio_direction_input(struct udevice *dev, unsigned offset)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	struct gpio_bank *bank = dev_get_priv(dev);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/* Configure GPIO direction as input. */
232*4882a593Smuzhiyun 	_set_gpio_direction(bank, offset, 1);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun /* set GPIO pin 'gpio' as an output, with polarity 'value' */
omap_gpio_direction_output(struct udevice * dev,unsigned offset,int value)238*4882a593Smuzhiyun static int omap_gpio_direction_output(struct udevice *dev, unsigned offset,
239*4882a593Smuzhiyun 				       int value)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct gpio_bank *bank = dev_get_priv(dev);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	_set_gpio_dataout(bank, offset, value);
244*4882a593Smuzhiyun 	_set_gpio_direction(bank, offset, 0);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun /* read GPIO IN value of pin 'gpio' */
omap_gpio_get_value(struct udevice * dev,unsigned offset)250*4882a593Smuzhiyun static int omap_gpio_get_value(struct udevice *dev, unsigned offset)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	struct gpio_bank *bank = dev_get_priv(dev);
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	return _get_gpio_value(bank, offset);
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun /* write GPIO OUT value to pin 'gpio' */
omap_gpio_set_value(struct udevice * dev,unsigned offset,int value)258*4882a593Smuzhiyun static int omap_gpio_set_value(struct udevice *dev, unsigned offset,
259*4882a593Smuzhiyun 				 int value)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	struct gpio_bank *bank = dev_get_priv(dev);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	_set_gpio_dataout(bank, offset, value);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun 
omap_gpio_get_function(struct udevice * dev,unsigned offset)268*4882a593Smuzhiyun static int omap_gpio_get_function(struct udevice *dev, unsigned offset)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	struct gpio_bank *bank = dev_get_priv(dev);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	/* GPIOF_FUNC is not implemented yet */
273*4882a593Smuzhiyun 	if (_get_gpio_direction(bank, offset) == OMAP_GPIO_DIR_OUT)
274*4882a593Smuzhiyun 		return GPIOF_OUTPUT;
275*4882a593Smuzhiyun 	else
276*4882a593Smuzhiyun 		return GPIOF_INPUT;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun static const struct dm_gpio_ops gpio_omap_ops = {
280*4882a593Smuzhiyun 	.direction_input	= omap_gpio_direction_input,
281*4882a593Smuzhiyun 	.direction_output	= omap_gpio_direction_output,
282*4882a593Smuzhiyun 	.get_value		= omap_gpio_get_value,
283*4882a593Smuzhiyun 	.set_value		= omap_gpio_set_value,
284*4882a593Smuzhiyun 	.get_function		= omap_gpio_get_function,
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun 
omap_gpio_probe(struct udevice * dev)287*4882a593Smuzhiyun static int omap_gpio_probe(struct udevice *dev)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct gpio_bank *bank = dev_get_priv(dev);
290*4882a593Smuzhiyun 	struct omap_gpio_platdata *plat = dev_get_platdata(dev);
291*4882a593Smuzhiyun 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	uc_priv->bank_name = plat->port_name;
294*4882a593Smuzhiyun 	uc_priv->gpio_count = GPIO_PER_BANK;
295*4882a593Smuzhiyun 	bank->base = (void *)plat->base;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
omap_gpio_bind(struct udevice * dev)300*4882a593Smuzhiyun static int omap_gpio_bind(struct udevice *dev)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	struct omap_gpio_platdata *plat = dev->platdata;
303*4882a593Smuzhiyun 	fdt_addr_t base_addr;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	if (plat)
306*4882a593Smuzhiyun 		return 0;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	base_addr = devfdt_get_addr(dev);
309*4882a593Smuzhiyun 	if (base_addr == FDT_ADDR_T_NONE)
310*4882a593Smuzhiyun 		return -EINVAL;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	/*
313*4882a593Smuzhiyun 	* TODO:
314*4882a593Smuzhiyun 	* When every board is converted to driver model and DT is
315*4882a593Smuzhiyun 	* supported, this can be done by auto-alloc feature, but
316*4882a593Smuzhiyun 	* not using calloc to alloc memory for platdata.
317*4882a593Smuzhiyun 	*/
318*4882a593Smuzhiyun 	plat = calloc(1, sizeof(*plat));
319*4882a593Smuzhiyun 	if (!plat)
320*4882a593Smuzhiyun 		return -ENOMEM;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	plat->base = base_addr;
323*4882a593Smuzhiyun 	plat->port_name = fdt_get_name(gd->fdt_blob, dev_of_offset(dev), NULL);
324*4882a593Smuzhiyun 	dev->platdata = plat;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	return 0;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun static const struct udevice_id omap_gpio_ids[] = {
330*4882a593Smuzhiyun 	{ .compatible = "ti,omap3-gpio" },
331*4882a593Smuzhiyun 	{ .compatible = "ti,omap4-gpio" },
332*4882a593Smuzhiyun 	{ .compatible = "ti,am4372-gpio" },
333*4882a593Smuzhiyun 	{ }
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun U_BOOT_DRIVER(gpio_omap) = {
337*4882a593Smuzhiyun 	.name	= "gpio_omap",
338*4882a593Smuzhiyun 	.id	= UCLASS_GPIO,
339*4882a593Smuzhiyun 	.ops	= &gpio_omap_ops,
340*4882a593Smuzhiyun 	.of_match = omap_gpio_ids,
341*4882a593Smuzhiyun 	.bind	= omap_gpio_bind,
342*4882a593Smuzhiyun 	.probe	= omap_gpio_probe,
343*4882a593Smuzhiyun 	.priv_auto_alloc_size = sizeof(struct gpio_bank),
344*4882a593Smuzhiyun };
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun #endif /* CONFIG_DM_GPIO */
347