1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Take drivers/gpio/gpio-74x164.c as reference.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <errno.h>
14*4882a593Smuzhiyun #include <dm.h>
15*4882a593Smuzhiyun #include <fdtdec.h>
16*4882a593Smuzhiyun #include <malloc.h>
17*4882a593Smuzhiyun #include <asm/gpio.h>
18*4882a593Smuzhiyun #include <asm/io.h>
19*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h>
20*4882a593Smuzhiyun #include <spi.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * struct gen_74x164_chip - Data for 74Hx164
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * @oe: OE pin
28*4882a593Smuzhiyun * @nregs: number of registers
29*4882a593Smuzhiyun * @buffer: buffer for chained chips
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun #define GEN_74X164_NUMBER_GPIOS 8
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct gen_74x164_priv {
34*4882a593Smuzhiyun struct gpio_desc oe;
35*4882a593Smuzhiyun u32 nregs;
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun * Since the nregs are chained, every byte sent will make
38*4882a593Smuzhiyun * the previous byte shift to the next register in the
39*4882a593Smuzhiyun * chain. Thus, the first byte sent will end up in the last
40*4882a593Smuzhiyun * register at the end of the transfer. So, to have a logical
41*4882a593Smuzhiyun * numbering, store the bytes in reverse order.
42*4882a593Smuzhiyun */
43*4882a593Smuzhiyun u8 *buffer;
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
gen_74x164_write_conf(struct udevice * dev)46*4882a593Smuzhiyun static int gen_74x164_write_conf(struct udevice *dev)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct gen_74x164_priv *priv = dev_get_priv(dev);
49*4882a593Smuzhiyun int ret;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun ret = dm_spi_claim_bus(dev);
52*4882a593Smuzhiyun if (ret)
53*4882a593Smuzhiyun return ret;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun ret = dm_spi_xfer(dev, priv->nregs * 8, priv->buffer, NULL,
56*4882a593Smuzhiyun SPI_XFER_BEGIN | SPI_XFER_END);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun dm_spi_release_bus(dev);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return ret;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
gen_74x164_get_value(struct udevice * dev,unsigned offset)63*4882a593Smuzhiyun static int gen_74x164_get_value(struct udevice *dev, unsigned offset)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct gen_74x164_priv *priv = dev_get_priv(dev);
66*4882a593Smuzhiyun uint bank = priv->nregs - 1 - offset / 8;
67*4882a593Smuzhiyun uint pin = offset % 8;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun return (priv->buffer[bank] >> pin) & 0x1;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
gen_74x164_set_value(struct udevice * dev,unsigned offset,int value)72*4882a593Smuzhiyun static int gen_74x164_set_value(struct udevice *dev, unsigned offset,
73*4882a593Smuzhiyun int value)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun struct gen_74x164_priv *priv = dev_get_priv(dev);
76*4882a593Smuzhiyun uint bank = priv->nregs - 1 - offset / 8;
77*4882a593Smuzhiyun uint pin = offset % 8;
78*4882a593Smuzhiyun int ret;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun if (value)
81*4882a593Smuzhiyun priv->buffer[bank] |= 1 << pin;
82*4882a593Smuzhiyun else
83*4882a593Smuzhiyun priv->buffer[bank] &= ~(1 << pin);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun ret = gen_74x164_write_conf(dev);
86*4882a593Smuzhiyun if (ret)
87*4882a593Smuzhiyun return ret;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
gen_74x164_direction_input(struct udevice * dev,unsigned offset)92*4882a593Smuzhiyun static int gen_74x164_direction_input(struct udevice *dev, unsigned offset)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun return -ENOSYS;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
gen_74x164_direction_output(struct udevice * dev,unsigned offset,int value)97*4882a593Smuzhiyun static int gen_74x164_direction_output(struct udevice *dev, unsigned offset,
98*4882a593Smuzhiyun int value)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun return gen_74x164_set_value(dev, offset, value);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
gen_74x164_get_function(struct udevice * dev,unsigned offset)103*4882a593Smuzhiyun static int gen_74x164_get_function(struct udevice *dev, unsigned offset)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun return GPIOF_OUTPUT;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
gen_74x164_xlate(struct udevice * dev,struct gpio_desc * desc,struct ofnode_phandle_args * args)108*4882a593Smuzhiyun static int gen_74x164_xlate(struct udevice *dev, struct gpio_desc *desc,
109*4882a593Smuzhiyun struct ofnode_phandle_args *args)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun desc->offset = args->args[0];
112*4882a593Smuzhiyun desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun static const struct dm_gpio_ops gen_74x164_ops = {
118*4882a593Smuzhiyun .direction_input = gen_74x164_direction_input,
119*4882a593Smuzhiyun .direction_output = gen_74x164_direction_output,
120*4882a593Smuzhiyun .get_value = gen_74x164_get_value,
121*4882a593Smuzhiyun .set_value = gen_74x164_set_value,
122*4882a593Smuzhiyun .get_function = gen_74x164_get_function,
123*4882a593Smuzhiyun .xlate = gen_74x164_xlate,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
gen_74x164_probe(struct udevice * dev)126*4882a593Smuzhiyun static int gen_74x164_probe(struct udevice *dev)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct gen_74x164_priv *priv = dev_get_priv(dev);
129*4882a593Smuzhiyun struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
130*4882a593Smuzhiyun char *str, name[32];
131*4882a593Smuzhiyun int ret;
132*4882a593Smuzhiyun const void *fdt = gd->fdt_blob;
133*4882a593Smuzhiyun int node = dev_of_offset(dev);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun snprintf(name, sizeof(name), "%s_", dev->name);
136*4882a593Smuzhiyun str = strdup(name);
137*4882a593Smuzhiyun if (!str)
138*4882a593Smuzhiyun return -ENOMEM;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /*
141*4882a593Smuzhiyun * See Linux kernel:
142*4882a593Smuzhiyun * Documentation/devicetree/bindings/gpio/gpio-74x164.txt
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun priv->nregs = fdtdec_get_int(fdt, node, "registers-number", 1);
145*4882a593Smuzhiyun priv->buffer = calloc(priv->nregs, sizeof(u8));
146*4882a593Smuzhiyun if (!priv->buffer) {
147*4882a593Smuzhiyun ret = -ENOMEM;
148*4882a593Smuzhiyun goto free_str;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun ret = fdtdec_get_byte_array(fdt, node, "registers-default",
152*4882a593Smuzhiyun priv->buffer, priv->nregs);
153*4882a593Smuzhiyun if (ret)
154*4882a593Smuzhiyun dev_dbg(dev, "No registers-default property\n");
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "oe-gpios", 0, &priv->oe,
157*4882a593Smuzhiyun GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
158*4882a593Smuzhiyun if (ret) {
159*4882a593Smuzhiyun dev_dbg(dev, "No oe-pins property\n");
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun uc_priv->bank_name = str;
163*4882a593Smuzhiyun uc_priv->gpio_count = priv->nregs * 8;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = gen_74x164_write_conf(dev);
166*4882a593Smuzhiyun if (ret)
167*4882a593Smuzhiyun goto free_buf;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun dev_dbg(dev, "%s is ready\n", dev->name);
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return 0;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun free_buf:
174*4882a593Smuzhiyun free(priv->buffer);
175*4882a593Smuzhiyun free_str:
176*4882a593Smuzhiyun free(str);
177*4882a593Smuzhiyun return ret;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun static const struct udevice_id gen_74x164_ids[] = {
181*4882a593Smuzhiyun { .compatible = "fairchild,74hc595" },
182*4882a593Smuzhiyun { }
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun U_BOOT_DRIVER(74x164) = {
186*4882a593Smuzhiyun .name = "74x164",
187*4882a593Smuzhiyun .id = UCLASS_GPIO,
188*4882a593Smuzhiyun .ops = &gen_74x164_ops,
189*4882a593Smuzhiyun .probe = gen_74x164_probe,
190*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct gen_74x164_priv),
191*4882a593Smuzhiyun .of_match = gen_74x164_ids,
192*4882a593Smuzhiyun };
193