1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2016 Stefan Roese <sr@denx.de>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <altera.h>
9*4882a593Smuzhiyun #include <spi.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /* Write the RBF data to FPGA via SPI */
program_write(int spi_bus,int spi_dev,const void * rbf_data,unsigned long rbf_size)14*4882a593Smuzhiyun static int program_write(int spi_bus, int spi_dev, const void *rbf_data,
15*4882a593Smuzhiyun unsigned long rbf_size)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun struct spi_slave *slave;
18*4882a593Smuzhiyun int ret;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun debug("%s (%d): data=%p size=%ld\n",
21*4882a593Smuzhiyun __func__, __LINE__, rbf_data, rbf_size);
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* FIXME: How to get the max. SPI clock and SPI mode? */
24*4882a593Smuzhiyun slave = spi_setup_slave(spi_bus, spi_dev, 27777777, SPI_MODE_3);
25*4882a593Smuzhiyun if (!slave)
26*4882a593Smuzhiyun return -1;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun if (spi_claim_bus(slave))
29*4882a593Smuzhiyun return -1;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun ret = spi_xfer(slave, rbf_size * 8, rbf_data, (void *)rbf_data,
32*4882a593Smuzhiyun SPI_XFER_BEGIN | SPI_XFER_END);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun spi_release_bus(slave);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return ret;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * This is the interface used by FPGA driver.
41*4882a593Smuzhiyun * Return 0 for sucess, non-zero for error.
42*4882a593Smuzhiyun */
stratixv_load(Altera_desc * desc,const void * rbf_data,size_t rbf_size)43*4882a593Smuzhiyun int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun altera_board_specific_func *pfns = desc->iface_fns;
46*4882a593Smuzhiyun int cookie = desc->cookie;
47*4882a593Smuzhiyun int spi_bus;
48*4882a593Smuzhiyun int spi_dev;
49*4882a593Smuzhiyun int ret = 0;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun if ((u32)rbf_data & 0x3) {
52*4882a593Smuzhiyun puts("FPGA: Unaligned data, realign to 32bit boundary.\n");
53*4882a593Smuzhiyun return -EINVAL;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* Run the pre configuration function if there is one */
57*4882a593Smuzhiyun if (pfns->pre)
58*4882a593Smuzhiyun (pfns->pre)(cookie);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Establish the initial state */
61*4882a593Smuzhiyun if (pfns->config) {
62*4882a593Smuzhiyun /* De-assert nCONFIG */
63*4882a593Smuzhiyun (pfns->config)(false, true, cookie);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* nConfig minimum low pulse width is 2us */
66*4882a593Smuzhiyun udelay(200);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Assert nCONFIG */
69*4882a593Smuzhiyun (pfns->config)(true, true, cookie);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* nCONFIG high to first rising clock on DCLK min 1506 us */
72*4882a593Smuzhiyun udelay(1600);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* Write the RBF data to FPGA */
76*4882a593Smuzhiyun if (pfns->write) {
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * Use board specific data function to write bitstream
79*4882a593Smuzhiyun * into the FPGA
80*4882a593Smuzhiyun */
81*4882a593Smuzhiyun ret = (pfns->write)(rbf_data, rbf_size, true, cookie);
82*4882a593Smuzhiyun } else {
83*4882a593Smuzhiyun /*
84*4882a593Smuzhiyun * Use common SPI functions to write bitstream into the
85*4882a593Smuzhiyun * FPGA
86*4882a593Smuzhiyun */
87*4882a593Smuzhiyun spi_bus = COOKIE2SPI_BUS(cookie);
88*4882a593Smuzhiyun spi_dev = COOKIE2SPI_DEV(cookie);
89*4882a593Smuzhiyun ret = program_write(spi_bus, spi_dev, rbf_data, rbf_size);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun if (ret)
92*4882a593Smuzhiyun return ret;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* Check done pin */
95*4882a593Smuzhiyun if (pfns->done) {
96*4882a593Smuzhiyun ret = (pfns->done)(cookie);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (ret)
99*4882a593Smuzhiyun printf("Error: DONE not set (ret=%d)!\n", ret);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return ret;
103*4882a593Smuzhiyun }
104