1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2010
3*4882a593Smuzhiyun * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2002
6*4882a593Smuzhiyun * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * ispVM functions adapted from Lattice's ispmVMEmbedded code:
9*4882a593Smuzhiyun * Copyright 2009 Lattice Semiconductor Corp.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <malloc.h>
16*4882a593Smuzhiyun #include <fpga.h>
17*4882a593Smuzhiyun #include <lattice.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static lattice_board_specific_func *pfns;
20*4882a593Smuzhiyun static const char *fpga_image;
21*4882a593Smuzhiyun static unsigned long read_bytes;
22*4882a593Smuzhiyun static unsigned long bufsize;
23*4882a593Smuzhiyun static unsigned short expectedCRC;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * External variables and functions declared in ivm_core.c module.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun extern unsigned short g_usCalculatedCRC;
29*4882a593Smuzhiyun extern unsigned short g_usDataType;
30*4882a593Smuzhiyun extern unsigned char *g_pucIntelBuffer;
31*4882a593Smuzhiyun extern unsigned char *g_pucHeapMemory;
32*4882a593Smuzhiyun extern unsigned short g_iHeapCounter;
33*4882a593Smuzhiyun extern unsigned short g_iHEAPSize;
34*4882a593Smuzhiyun extern unsigned short g_usIntelDataIndex;
35*4882a593Smuzhiyun extern unsigned short g_usIntelBufferSize;
36*4882a593Smuzhiyun extern char *const g_szSupportedVersions[];
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * ispVMDelay
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * Users must implement a delay to observe a_usTimeDelay, where
43*4882a593Smuzhiyun * bit 15 of the a_usTimeDelay defines the unit.
44*4882a593Smuzhiyun * 1 = milliseconds
45*4882a593Smuzhiyun * 0 = microseconds
46*4882a593Smuzhiyun * Example:
47*4882a593Smuzhiyun * a_usTimeDelay = 0x0001 = 1 microsecond delay.
48*4882a593Smuzhiyun * a_usTimeDelay = 0x8001 = 1 millisecond delay.
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun * This subroutine is called upon to provide a delay from 1 millisecond to a few
51*4882a593Smuzhiyun * hundreds milliseconds each time.
52*4882a593Smuzhiyun * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16
53*4882a593Smuzhiyun * bits integer, this function is restricted to produce a delay to 64000
54*4882a593Smuzhiyun * micro-seconds or 32000 milli-second maximum. The VME file will never pass on
55*4882a593Smuzhiyun * to this function a delay time > those maximum number. If it needs more than
56*4882a593Smuzhiyun * those maximum, the VME file will launch the delay function several times to
57*4882a593Smuzhiyun * realize a larger delay time cummulatively.
58*4882a593Smuzhiyun * It is perfectly alright to provide a longer delay than required. It is not
59*4882a593Smuzhiyun * acceptable if the delay is shorter.
60*4882a593Smuzhiyun */
ispVMDelay(unsigned short delay)61*4882a593Smuzhiyun void ispVMDelay(unsigned short delay)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun if (delay & 0x8000)
64*4882a593Smuzhiyun delay = (delay & ~0x8000) * 1000;
65*4882a593Smuzhiyun udelay(delay);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
writePort(unsigned char a_ucPins,unsigned char a_ucValue)68*4882a593Smuzhiyun void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun a_ucValue = a_ucValue ? 1 : 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun switch (a_ucPins) {
73*4882a593Smuzhiyun case g_ucPinTDI:
74*4882a593Smuzhiyun pfns->jtag_set_tdi(a_ucValue);
75*4882a593Smuzhiyun break;
76*4882a593Smuzhiyun case g_ucPinTCK:
77*4882a593Smuzhiyun pfns->jtag_set_tck(a_ucValue);
78*4882a593Smuzhiyun break;
79*4882a593Smuzhiyun case g_ucPinTMS:
80*4882a593Smuzhiyun pfns->jtag_set_tms(a_ucValue);
81*4882a593Smuzhiyun break;
82*4882a593Smuzhiyun default:
83*4882a593Smuzhiyun printf("%s: requested unknown pin\n", __func__);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
readPort(void)87*4882a593Smuzhiyun unsigned char readPort(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun return pfns->jtag_get_tdo();
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
sclock(void)92*4882a593Smuzhiyun void sclock(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x01);
95*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x00);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
calibration(void)98*4882a593Smuzhiyun void calibration(void)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun /* Apply 2 pulses to TCK. */
101*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x00);
102*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x01);
103*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x00);
104*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x01);
105*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x00);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun ispVMDelay(0x8001);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* Apply 2 pulses to TCK. */
110*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x01);
111*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x00);
112*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x01);
113*4882a593Smuzhiyun writePort(g_ucPinTCK, 0x00);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /*
117*4882a593Smuzhiyun * GetByte
118*4882a593Smuzhiyun *
119*4882a593Smuzhiyun * Returns a byte to the caller. The returned byte depends on the
120*4882a593Smuzhiyun * g_usDataType register. If the HEAP_IN bit is set, then the byte
121*4882a593Smuzhiyun * is returned from the HEAP. If the LHEAP_IN bit is set, then
122*4882a593Smuzhiyun * the byte is returned from the intelligent buffer. Otherwise,
123*4882a593Smuzhiyun * the byte is returned directly from the VME file.
124*4882a593Smuzhiyun */
GetByte(void)125*4882a593Smuzhiyun unsigned char GetByte(void)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun unsigned char ucData;
128*4882a593Smuzhiyun unsigned int block_size = 4 * 1024;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (g_usDataType & HEAP_IN) {
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /*
133*4882a593Smuzhiyun * Get data from repeat buffer.
134*4882a593Smuzhiyun */
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (g_iHeapCounter > g_iHEAPSize) {
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /*
139*4882a593Smuzhiyun * Data over-run.
140*4882a593Smuzhiyun */
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return 0xFF;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ucData = g_pucHeapMemory[g_iHeapCounter++];
146*4882a593Smuzhiyun } else if (g_usDataType & LHEAP_IN) {
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /*
149*4882a593Smuzhiyun * Get data from intel buffer.
150*4882a593Smuzhiyun */
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (g_usIntelDataIndex >= g_usIntelBufferSize) {
153*4882a593Smuzhiyun return 0xFF;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
157*4882a593Smuzhiyun } else {
158*4882a593Smuzhiyun if (read_bytes == bufsize) {
159*4882a593Smuzhiyun return 0xFF;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun ucData = *fpga_image++;
162*4882a593Smuzhiyun read_bytes++;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun if (!(read_bytes % block_size)) {
165*4882a593Smuzhiyun printf("Downloading FPGA %ld/%ld completed\r",
166*4882a593Smuzhiyun read_bytes,
167*4882a593Smuzhiyun bufsize);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun if (expectedCRC != 0) {
171*4882a593Smuzhiyun ispVMCalculateCRC32(ucData);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return ucData;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
ispVM(void)178*4882a593Smuzhiyun signed char ispVM(void)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun char szFileVersion[9] = { 0 };
181*4882a593Smuzhiyun signed char cRetCode = 0;
182*4882a593Smuzhiyun signed char cIndex = 0;
183*4882a593Smuzhiyun signed char cVersionIndex = 0;
184*4882a593Smuzhiyun unsigned char ucReadByte = 0;
185*4882a593Smuzhiyun unsigned short crc;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun g_pucHeapMemory = NULL;
188*4882a593Smuzhiyun g_iHeapCounter = 0;
189*4882a593Smuzhiyun g_iHEAPSize = 0;
190*4882a593Smuzhiyun g_usIntelDataIndex = 0;
191*4882a593Smuzhiyun g_usIntelBufferSize = 0;
192*4882a593Smuzhiyun g_usCalculatedCRC = 0;
193*4882a593Smuzhiyun expectedCRC = 0;
194*4882a593Smuzhiyun ucReadByte = GetByte();
195*4882a593Smuzhiyun switch (ucReadByte) {
196*4882a593Smuzhiyun case FILE_CRC:
197*4882a593Smuzhiyun crc = (unsigned char)GetByte();
198*4882a593Smuzhiyun crc <<= 8;
199*4882a593Smuzhiyun crc |= GetByte();
200*4882a593Smuzhiyun expectedCRC = crc;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun for (cIndex = 0; cIndex < 8; cIndex++)
203*4882a593Smuzhiyun szFileVersion[cIndex] = GetByte();
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun break;
206*4882a593Smuzhiyun default:
207*4882a593Smuzhiyun szFileVersion[0] = (signed char) ucReadByte;
208*4882a593Smuzhiyun for (cIndex = 1; cIndex < 8; cIndex++)
209*4882a593Smuzhiyun szFileVersion[cIndex] = GetByte();
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun break;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /*
215*4882a593Smuzhiyun *
216*4882a593Smuzhiyun * Compare the VME file version against the supported version.
217*4882a593Smuzhiyun *
218*4882a593Smuzhiyun */
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0;
221*4882a593Smuzhiyun cVersionIndex++) {
222*4882a593Smuzhiyun for (cIndex = 0; cIndex < 8; cIndex++) {
223*4882a593Smuzhiyun if (szFileVersion[cIndex] !=
224*4882a593Smuzhiyun g_szSupportedVersions[cVersionIndex][cIndex]) {
225*4882a593Smuzhiyun cRetCode = VME_VERSION_FAILURE;
226*4882a593Smuzhiyun break;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun cRetCode = 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun if (cRetCode == 0) {
232*4882a593Smuzhiyun break;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun if (cRetCode < 0) {
237*4882a593Smuzhiyun return VME_VERSION_FAILURE;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun printf("VME file checked: starting downloading to FPGA\n");
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun ispVMStart();
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun cRetCode = ispVMCode();
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun ispVMEnd();
247*4882a593Smuzhiyun ispVMFreeMem();
248*4882a593Smuzhiyun puts("\n");
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (cRetCode == 0 && expectedCRC != 0 &&
251*4882a593Smuzhiyun (expectedCRC != g_usCalculatedCRC)) {
252*4882a593Smuzhiyun printf("Expected CRC: 0x%.4X\n", expectedCRC);
253*4882a593Smuzhiyun printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
254*4882a593Smuzhiyun return VME_CRC_FAILURE;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun return cRetCode;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
lattice_validate(Lattice_desc * desc,const char * fn)259*4882a593Smuzhiyun static int lattice_validate(Lattice_desc *desc, const char *fn)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun int ret_val = false;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (desc) {
264*4882a593Smuzhiyun if ((desc->family > min_lattice_type) &&
265*4882a593Smuzhiyun (desc->family < max_lattice_type)) {
266*4882a593Smuzhiyun if ((desc->iface > min_lattice_iface_type) &&
267*4882a593Smuzhiyun (desc->iface < max_lattice_iface_type)) {
268*4882a593Smuzhiyun if (desc->size) {
269*4882a593Smuzhiyun ret_val = true;
270*4882a593Smuzhiyun } else {
271*4882a593Smuzhiyun printf("%s: NULL part size\n", fn);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun } else {
274*4882a593Smuzhiyun printf("%s: Invalid Interface type, %d\n",
275*4882a593Smuzhiyun fn, desc->iface);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun } else {
278*4882a593Smuzhiyun printf("%s: Invalid family type, %d\n",
279*4882a593Smuzhiyun fn, desc->family);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun } else {
282*4882a593Smuzhiyun printf("%s: NULL descriptor!\n", fn);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun return ret_val;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
lattice_load(Lattice_desc * desc,const void * buf,size_t bsize)288*4882a593Smuzhiyun int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun int ret_val = FPGA_FAIL;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (!lattice_validate(desc, (char *)__func__)) {
293*4882a593Smuzhiyun printf("%s: Invalid device descriptor\n", __func__);
294*4882a593Smuzhiyun } else {
295*4882a593Smuzhiyun pfns = desc->iface_fns;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun switch (desc->family) {
298*4882a593Smuzhiyun case Lattice_XP2:
299*4882a593Smuzhiyun fpga_image = buf;
300*4882a593Smuzhiyun read_bytes = 0;
301*4882a593Smuzhiyun bufsize = bsize;
302*4882a593Smuzhiyun debug("%s: Launching the Lattice ISPVME Loader:"
303*4882a593Smuzhiyun " addr %p size 0x%lx...\n",
304*4882a593Smuzhiyun __func__, fpga_image, bufsize);
305*4882a593Smuzhiyun ret_val = ispVM();
306*4882a593Smuzhiyun if (ret_val)
307*4882a593Smuzhiyun printf("%s: error %d downloading FPGA image\n",
308*4882a593Smuzhiyun __func__, ret_val);
309*4882a593Smuzhiyun else
310*4882a593Smuzhiyun puts("FPGA downloaded successfully\n");
311*4882a593Smuzhiyun break;
312*4882a593Smuzhiyun default:
313*4882a593Smuzhiyun printf("%s: Unsupported family type, %d\n",
314*4882a593Smuzhiyun __func__, desc->family);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return ret_val;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
lattice_dump(Lattice_desc * desc,const void * buf,size_t bsize)321*4882a593Smuzhiyun int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun puts("Dump not supported for Lattice FPGA\n");
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun return FPGA_FAIL;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
lattice_info(Lattice_desc * desc)329*4882a593Smuzhiyun int lattice_info(Lattice_desc *desc)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun int ret_val = FPGA_FAIL;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun if (lattice_validate(desc, (char *)__func__)) {
334*4882a593Smuzhiyun printf("Family: \t");
335*4882a593Smuzhiyun switch (desc->family) {
336*4882a593Smuzhiyun case Lattice_XP2:
337*4882a593Smuzhiyun puts("XP2\n");
338*4882a593Smuzhiyun break;
339*4882a593Smuzhiyun /* Add new family types here */
340*4882a593Smuzhiyun default:
341*4882a593Smuzhiyun printf("Unknown family type, %d\n", desc->family);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun puts("Interface type:\t");
345*4882a593Smuzhiyun switch (desc->iface) {
346*4882a593Smuzhiyun case lattice_jtag_mode:
347*4882a593Smuzhiyun puts("JTAG Mode\n");
348*4882a593Smuzhiyun break;
349*4882a593Smuzhiyun /* Add new interface types here */
350*4882a593Smuzhiyun default:
351*4882a593Smuzhiyun printf("Unsupported interface type, %d\n", desc->iface);
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun printf("Device Size: \t%d bytes\n",
355*4882a593Smuzhiyun desc->size);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (desc->iface_fns) {
358*4882a593Smuzhiyun printf("Device Function Table @ 0x%p\n",
359*4882a593Smuzhiyun desc->iface_fns);
360*4882a593Smuzhiyun switch (desc->family) {
361*4882a593Smuzhiyun case Lattice_XP2:
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun /* Add new family types here */
364*4882a593Smuzhiyun default:
365*4882a593Smuzhiyun break;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun } else {
368*4882a593Smuzhiyun puts("No Device Function Table.\n");
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (desc->desc)
372*4882a593Smuzhiyun printf("Model: \t%s\n", desc->desc);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun ret_val = FPGA_SUCCESS;
375*4882a593Smuzhiyun } else {
376*4882a593Smuzhiyun printf("%s: Invalid device descriptor\n", __func__);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun return ret_val;
380*4882a593Smuzhiyun }
381