1*4882a593Smuzhiyunmenu "FPGA support" 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig FPGA 4*4882a593Smuzhiyun bool 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig FPGA_ALTERA 7*4882a593Smuzhiyun bool "Enable Altera FPGA drivers" 8*4882a593Smuzhiyun select FPGA 9*4882a593Smuzhiyun help 10*4882a593Smuzhiyun Say Y here to enable the Altera FPGA driver 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun This provides basic infrastructure to support Altera FPGA devices. 13*4882a593Smuzhiyun Enable Altera FPGA specific functions which includes bitstream 14*4882a593Smuzhiyun (in BIT format), fpga and device validation. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunconfig FPGA_SOCFPGA 17*4882a593Smuzhiyun bool "Enable Gen5 and Arria10 common FPGA drivers" 18*4882a593Smuzhiyun select FPGA_ALTERA 19*4882a593Smuzhiyun help 20*4882a593Smuzhiyun Say Y here to enable the Gen5 and Arria10 common FPGA driver 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun This provides common functionality for Gen5 and Arria10 devices. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunconfig FPGA_CYCLON2 25*4882a593Smuzhiyun bool "Enable Altera FPGA driver for Cyclone II" 26*4882a593Smuzhiyun depends on FPGA_ALTERA 27*4882a593Smuzhiyun help 28*4882a593Smuzhiyun Say Y here to enable the Altera Cyclone II FPGA specific driver 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun This provides common functionality for Altera Cyclone II devices. 31*4882a593Smuzhiyun Enable FPGA driver for loading bitstream in BIT and BIN format 32*4882a593Smuzhiyun on Altera Cyclone II device. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunconfig FPGA_XILINX 35*4882a593Smuzhiyun bool "Enable Xilinx FPGA drivers" 36*4882a593Smuzhiyun select FPGA 37*4882a593Smuzhiyun help 38*4882a593Smuzhiyun Enable Xilinx FPGA specific functions which includes bitstream 39*4882a593Smuzhiyun (in BIT format), fpga and device validation. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunconfig FPGA_ZYNQMPPL 42*4882a593Smuzhiyun bool "Enable Xilinx FPGA driver for ZynqMP" 43*4882a593Smuzhiyun depends on FPGA_XILINX 44*4882a593Smuzhiyun help 45*4882a593Smuzhiyun Enable FPGA driver for loading bitstream in BIT and BIN format 46*4882a593Smuzhiyun on Xilinx Zynq UltraScale+ (ZynqMP) device. 47*4882a593Smuzhiyun 48*4882a593Smuzhiyunconfig FPGA_ROCKCHIP 49*4882a593Smuzhiyun bool "Enable Rockchip FPGA drivers" 50*4882a593Smuzhiyun depends on ARCH_ROCKCHIP 51*4882a593Smuzhiyun help 52*4882a593Smuzhiyun Enale Rockchip FPGA specific functions. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunconfig FPGA_MMC 55*4882a593Smuzhiyun bool "FPGA board with MMC" 56*4882a593Smuzhiyun depends on FPGA_ROCKCHIP 57*4882a593Smuzhiyun 58*4882a593Smuzhiyunconfig FPGA_RAM 59*4882a593Smuzhiyun bool "FPGA board with RAM" 60*4882a593Smuzhiyun depends on FPGA_ROCKCHIP 61*4882a593Smuzhiyun select SPL_RAM_SUPPORT 62*4882a593Smuzhiyun select DM_RAMDISK 63*4882a593Smuzhiyun select RAMDISK_RO 64*4882a593Smuzhiyunendmenu 65