1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2021 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun description = "Rockchip AMP FIT Image"; 10*4882a593Smuzhiyun #address-cells = <1>; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun images { 13*4882a593Smuzhiyun /* ARM cortex-A core */ 14*4882a593Smuzhiyun amp1 { 15*4882a593Smuzhiyun description = "bare-mental-core1"; 16*4882a593Smuzhiyun data = /incbin/("./amp1.bin"); 17*4882a593Smuzhiyun type = "firmware"; // must be "firmware" 18*4882a593Smuzhiyun compression = "none"; 19*4882a593Smuzhiyun arch = "arm"; // "arm64" or "arm", the same as U-Boot state 20*4882a593Smuzhiyun cpu = <0x100>; // mpidr 21*4882a593Smuzhiyun thumb = <0>; // 0: arm or thumb2; 1: thumb 22*4882a593Smuzhiyun hyp = <0>; // 0: el1/svc; 1: el2/hyp 23*4882a593Smuzhiyun load = <0x01800000>; 24*4882a593Smuzhiyun udelay = <1000000>; 25*4882a593Smuzhiyun hash { 26*4882a593Smuzhiyun algo = "sha256"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun amp2 { 31*4882a593Smuzhiyun description = "bare-mental-core2"; 32*4882a593Smuzhiyun data = /incbin/("./amp2.bin"); 33*4882a593Smuzhiyun type = "firmware"; 34*4882a593Smuzhiyun compression = "none"; 35*4882a593Smuzhiyun arch = "arm"; 36*4882a593Smuzhiyun cpu = <0x200>; 37*4882a593Smuzhiyun thumb = <0>; 38*4882a593Smuzhiyun hyp = <0>; 39*4882a593Smuzhiyun load = <0x03800000>; 40*4882a593Smuzhiyun udelay = <1000000>; 41*4882a593Smuzhiyun hash { 42*4882a593Smuzhiyun algo = "sha256"; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun amp3 { 47*4882a593Smuzhiyun description = "bare-mental-core3"; 48*4882a593Smuzhiyun data = /incbin/("./amp3.bin"); 49*4882a593Smuzhiyun type = "firmware"; 50*4882a593Smuzhiyun compression = "none"; 51*4882a593Smuzhiyun arch = "arm"; 52*4882a593Smuzhiyun cpu = <0x300>; 53*4882a593Smuzhiyun thumb = <0>; 54*4882a593Smuzhiyun hyp = <0>; 55*4882a593Smuzhiyun load = <0x05800000>; 56*4882a593Smuzhiyun udelay = <1000000>; 57*4882a593Smuzhiyun hash { 58*4882a593Smuzhiyun algo = "sha256"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* Other core */ 63*4882a593Smuzhiyun amp4 { 64*4882a593Smuzhiyun description = "standalone-mcu1"; 65*4882a593Smuzhiyun data = /incbin/("./mcu1.bin"); 66*4882a593Smuzhiyun type = "standalone"; // must be "standalone" 67*4882a593Smuzhiyun compression = "none"; 68*4882a593Smuzhiyun arch = "arm"; // "arm64" or "arm", the same as U-Boot state 69*4882a593Smuzhiyun load = <0x06800000>; 70*4882a593Smuzhiyun udelay = <1000000>; 71*4882a593Smuzhiyun hash { 72*4882a593Smuzhiyun algo = "sha256"; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun configurations { 78*4882a593Smuzhiyun default = "conf"; 79*4882a593Smuzhiyun conf { 80*4882a593Smuzhiyun description = "Rockchip AMP images"; 81*4882a593Smuzhiyun rollback-index = <0x0>; 82*4882a593Smuzhiyun loadables = "amp1", "amp2", "amp3", "amp4"; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun signature { 85*4882a593Smuzhiyun algo = "sha256,rsa2048"; 86*4882a593Smuzhiyun padding = "pss"; 87*4882a593Smuzhiyun key-name-hint = "dev"; 88*4882a593Smuzhiyun sign-images = "loadables"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* - run linux on cpu0 92*4882a593Smuzhiyun * - it is brought up by amp(that run on U-Boot) 93*4882a593Smuzhiyun * - it is boot entry depends on U-Boot 94*4882a593Smuzhiyun */ 95*4882a593Smuzhiyun linux { 96*4882a593Smuzhiyun description = "linux-os"; 97*4882a593Smuzhiyun arch = "arm64"; 98*4882a593Smuzhiyun cpu = <0x000>; 99*4882a593Smuzhiyun thumb = <0>; 100*4882a593Smuzhiyun hyp = <0>; 101*4882a593Smuzhiyun udelay = <1000000>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun}; 106