1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Socionext Inc. 3*4882a593Smuzhiyun * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include "clk-uniphier.h" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define UNIPHIER_MIO_CLK_SD_GATE(id, ch) \ 11*4882a593Smuzhiyun UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 8) 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define UNIPHIER_MIO_CLK_USB2(id, ch) \ 14*4882a593Smuzhiyun UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 28) 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define UNIPHIER_MIO_CLK_USB2_PHY(id, ch) \ 17*4882a593Smuzhiyun UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 29) 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define UNIPHIER_MIO_CLK_DMAC(id) \ 20*4882a593Smuzhiyun UNIPHIER_CLK_GATE((id), 0x20, 25) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define UNIPHIER_MIO_CLK_SD_MUX(_id, ch) \ 23*4882a593Smuzhiyun { \ 24*4882a593Smuzhiyun .id = (_id), \ 25*4882a593Smuzhiyun .nr_muxs = 8, \ 26*4882a593Smuzhiyun .reg = 0x30 + 0x200 * (ch), \ 27*4882a593Smuzhiyun .masks = { \ 28*4882a593Smuzhiyun 0x00031000, \ 29*4882a593Smuzhiyun 0x00031000, \ 30*4882a593Smuzhiyun 0x00031000, \ 31*4882a593Smuzhiyun 0x00031000, \ 32*4882a593Smuzhiyun 0x00001300, \ 33*4882a593Smuzhiyun 0x00001300, \ 34*4882a593Smuzhiyun 0x00001300, \ 35*4882a593Smuzhiyun 0x00001300, \ 36*4882a593Smuzhiyun }, \ 37*4882a593Smuzhiyun .vals = { \ 38*4882a593Smuzhiyun 0x00000000, \ 39*4882a593Smuzhiyun 0x00010000, \ 40*4882a593Smuzhiyun 0x00020000, \ 41*4882a593Smuzhiyun 0x00030000, \ 42*4882a593Smuzhiyun 0x00001000, \ 43*4882a593Smuzhiyun 0x00001100, \ 44*4882a593Smuzhiyun 0x00001200, \ 45*4882a593Smuzhiyun 0x00001300, \ 46*4882a593Smuzhiyun }, \ 47*4882a593Smuzhiyun .rates = { \ 48*4882a593Smuzhiyun 44444444, \ 49*4882a593Smuzhiyun 33333333, \ 50*4882a593Smuzhiyun 50000000, \ 51*4882a593Smuzhiyun 66666666, \ 52*4882a593Smuzhiyun 100000000, \ 53*4882a593Smuzhiyun 40000000, \ 54*4882a593Smuzhiyun 25000000, \ 55*4882a593Smuzhiyun 22222222, \ 56*4882a593Smuzhiyun }, \ 57*4882a593Smuzhiyun } 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { 60*4882a593Smuzhiyun UNIPHIER_MIO_CLK_SD_GATE(0, 0), 61*4882a593Smuzhiyun UNIPHIER_MIO_CLK_SD_GATE(1, 1), 62*4882a593Smuzhiyun UNIPHIER_MIO_CLK_SD_GATE(2, 2), /* for PH1-Pro4 only */ 63*4882a593Smuzhiyun UNIPHIER_MIO_CLK_DMAC(7), 64*4882a593Smuzhiyun UNIPHIER_MIO_CLK_USB2(8, 0), 65*4882a593Smuzhiyun UNIPHIER_MIO_CLK_USB2(9, 1), 66*4882a593Smuzhiyun UNIPHIER_MIO_CLK_USB2(10, 2), 67*4882a593Smuzhiyun UNIPHIER_MIO_CLK_USB2_PHY(12, 0), 68*4882a593Smuzhiyun UNIPHIER_MIO_CLK_USB2_PHY(13, 1), 69*4882a593Smuzhiyun UNIPHIER_MIO_CLK_USB2_PHY(14, 2), 70*4882a593Smuzhiyun UNIPHIER_CLK_END 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun static const struct uniphier_clk_mux_data uniphier_mio_clk_mux[] = { 74*4882a593Smuzhiyun UNIPHIER_MIO_CLK_SD_MUX(0, 0), 75*4882a593Smuzhiyun UNIPHIER_MIO_CLK_SD_MUX(1, 1), 76*4882a593Smuzhiyun UNIPHIER_MIO_CLK_SD_MUX(2, 2), /* for PH1-Pro4 only */ 77*4882a593Smuzhiyun UNIPHIER_CLK_END 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun const struct uniphier_clk_data uniphier_mio_clk_data = { 81*4882a593Smuzhiyun .gate = uniphier_mio_clk_gate, 82*4882a593Smuzhiyun .mux = uniphier_mio_clk_mux, 83*4882a593Smuzhiyun }; 84