1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# Copyright (c) 2017 Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun# 4*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_CLK_PLL) += clk_pll.o 8*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o 9*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK1808) += clk_rk1808.o 10*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o 11*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o 12*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o 13*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o 14*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o 15*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o 16*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3308) += clk_rk3308.o 17*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o 18*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o 19*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o 20*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3528) += clk_rk3528.o 21*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3562) += clk_rk3562.o 22*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o 23*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RK3588) += clk_rk3588.o 24*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RV1106) += clk_rv1106.o 25*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o 26*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o 27