clk/exynos/clk-pll.h

*4882a593Smuzhiyun/*
*4882a593Smuzhiyun * Exynos PLL helper functions for clock drivers.
*4882a593Smuzhiyun * Copyright (C) 2016 Samsung Electronics
*4882a593Smuzhiyun * Thomas Abraham <thomas.ab@samsung.com>
*4882a593Smuzhiyun *
*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0+
*4882a593Smuzhiyun */
*4882a593Smuzhiyun
*4882a593Smuzhiyununsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);