xref: /OK3568_Linux_fs/u-boot/drivers/clk/at91/clk-h32mx.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2016 Atmel Corporation
3*4882a593Smuzhiyun  *               Wenyou.Yang <wenyou.yang@atmel.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <clk-uclass.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <dm/util.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <mach/at91_pmc.h>
14*4882a593Smuzhiyun #include "pmc.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define H32MX_MAX_FREQ	90000000
19*4882a593Smuzhiyun 
sama5d4_h32mx_clk_get_rate(struct clk * clk)20*4882a593Smuzhiyun static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun 	struct pmc_platdata *plat = dev_get_platdata(clk->dev);
23*4882a593Smuzhiyun 	struct at91_pmc *pmc = plat->reg_base;
24*4882a593Smuzhiyun 	ulong rate = gd->arch.mck_rate_hz;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	if (readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV)
27*4882a593Smuzhiyun 		rate /= 2;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	if (rate > H32MX_MAX_FREQ)
30*4882a593Smuzhiyun 		dm_warn("H32MX clock is too fast\n");
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	return rate;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun static struct clk_ops sama5d4_h32mx_clk_ops = {
36*4882a593Smuzhiyun 	.get_rate = sama5d4_h32mx_clk_get_rate,
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
sama5d4_h32mx_clk_probe(struct udevice * dev)39*4882a593Smuzhiyun static int sama5d4_h32mx_clk_probe(struct udevice *dev)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	return at91_pmc_core_probe(dev);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static const struct udevice_id sama5d4_h32mx_clk_match[] = {
45*4882a593Smuzhiyun 	{ .compatible = "atmel,sama5d4-clk-h32mx" },
46*4882a593Smuzhiyun 	{}
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun U_BOOT_DRIVER(sama5d4_h32mx_clk) = {
50*4882a593Smuzhiyun 	.name = "sama5d4-h32mx-clk",
51*4882a593Smuzhiyun 	.id = UCLASS_CLK,
52*4882a593Smuzhiyun 	.of_match = sama5d4_h32mx_clk_match,
53*4882a593Smuzhiyun 	.probe = sama5d4_h32mx_clk_probe,
54*4882a593Smuzhiyun 	.platdata_auto_alloc_size = sizeof(struct pmc_platdata),
55*4882a593Smuzhiyun 	.ops = &sama5d4_h32mx_clk_ops,
56*4882a593Smuzhiyun };
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