xref: /OK3568_Linux_fs/u-boot/drivers/bios_emulator/include/x86emu/regs.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /****************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun *			Realmode X86 Emulator Library
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *		Copyright (C) 1991-2004 SciTech Software, Inc.
6*4882a593Smuzhiyun *		     Copyright (C) David Mosberger-Tang
7*4882a593Smuzhiyun *		       Copyright (C) 1999 Egbert Eich
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun *  ========================================================================
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun *  Permission to use, copy, modify, distribute, and sell this software and
12*4882a593Smuzhiyun *  its documentation for any purpose is hereby granted without fee,
13*4882a593Smuzhiyun *  provided that the above copyright notice appear in all copies and that
14*4882a593Smuzhiyun *  both that copyright notice and this permission notice appear in
15*4882a593Smuzhiyun *  supporting documentation, and that the name of the authors not be used
16*4882a593Smuzhiyun *  in advertising or publicity pertaining to distribution of the software
17*4882a593Smuzhiyun *  without specific, written prior permission.	The authors makes no
18*4882a593Smuzhiyun *  representations about the suitability of this software for any purpose.
19*4882a593Smuzhiyun *  It is provided "as is" without express or implied warranty.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun *  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
22*4882a593Smuzhiyun *  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
23*4882a593Smuzhiyun *  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
24*4882a593Smuzhiyun *  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
25*4882a593Smuzhiyun *  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
26*4882a593Smuzhiyun *  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
27*4882a593Smuzhiyun *  PERFORMANCE OF THIS SOFTWARE.
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun *  ========================================================================
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * Language:	ANSI C
32*4882a593Smuzhiyun * Environment:	Any
33*4882a593Smuzhiyun * Developer:	Kendall Bennett
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * Description:	Header file for x86 register definitions.
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun ****************************************************************************/
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #ifndef __X86EMU_REGS_H
40*4882a593Smuzhiyun #define __X86EMU_REGS_H
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /*---------------------- Macros and type definitions ----------------------*/
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #pragma pack(1)
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun  * General EAX, EBX, ECX, EDX type registers.  Note that for
48*4882a593Smuzhiyun  * portability, and speed, the issue of byte swapping is not addressed
49*4882a593Smuzhiyun  * in the registers.  All registers are stored in the default format
50*4882a593Smuzhiyun  * available on the host machine.  The only critical issue is that the
51*4882a593Smuzhiyun  * registers should line up EXACTLY in the same manner as they do in
52*4882a593Smuzhiyun  * the 386.  That is:
53*4882a593Smuzhiyun  *
54*4882a593Smuzhiyun  * EAX & 0xff  === AL
55*4882a593Smuzhiyun  * EAX & 0xffff == AX
56*4882a593Smuzhiyun  *
57*4882a593Smuzhiyun  * etc.	 The result is that alot of the calculations can then be
58*4882a593Smuzhiyun  * done using the native instruction set fully.
59*4882a593Smuzhiyun  */
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #ifdef	__BIG_ENDIAN__
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun typedef struct {
64*4882a593Smuzhiyun 	u32 e_reg;
65*4882a593Smuzhiyun } I32_reg_t;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun typedef struct {
68*4882a593Smuzhiyun 	u16 filler0, x_reg;
69*4882a593Smuzhiyun } I16_reg_t;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun typedef struct {
72*4882a593Smuzhiyun 	u8 filler0, filler1, h_reg, l_reg;
73*4882a593Smuzhiyun } I8_reg_t;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #else				/* !__BIG_ENDIAN__ */
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun typedef struct {
78*4882a593Smuzhiyun 	u32 e_reg;
79*4882a593Smuzhiyun } I32_reg_t;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun typedef struct {
82*4882a593Smuzhiyun 	u16 x_reg;
83*4882a593Smuzhiyun } I16_reg_t;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun typedef struct {
86*4882a593Smuzhiyun 	u8 l_reg, h_reg;
87*4882a593Smuzhiyun } I8_reg_t;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #endif				/* BIG_ENDIAN */
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun typedef union {
92*4882a593Smuzhiyun 	I32_reg_t I32_reg;
93*4882a593Smuzhiyun 	I16_reg_t I16_reg;
94*4882a593Smuzhiyun 	I8_reg_t I8_reg;
95*4882a593Smuzhiyun } i386_general_register;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun struct i386_general_regs {
98*4882a593Smuzhiyun 	i386_general_register A, B, C, D;
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun typedef struct i386_general_regs Gen_reg_t;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun struct i386_special_regs {
104*4882a593Smuzhiyun 	i386_general_register SP, BP, SI, DI, IP;
105*4882a593Smuzhiyun 	u32 FLAGS;
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /*
109*4882a593Smuzhiyun  * Segment registers here represent the 16 bit quantities
110*4882a593Smuzhiyun  * CS, DS, ES, SS.
111*4882a593Smuzhiyun  */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #undef CS
114*4882a593Smuzhiyun #undef DS
115*4882a593Smuzhiyun #undef SS
116*4882a593Smuzhiyun #undef ES
117*4882a593Smuzhiyun #undef FS
118*4882a593Smuzhiyun #undef GS
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun struct i386_segment_regs {
121*4882a593Smuzhiyun 	u16 CS, DS, SS, ES, FS, GS;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /* 8 bit registers */
125*4882a593Smuzhiyun #define R_AH  gen.A.I8_reg.h_reg
126*4882a593Smuzhiyun #define R_AL  gen.A.I8_reg.l_reg
127*4882a593Smuzhiyun #define R_BH  gen.B.I8_reg.h_reg
128*4882a593Smuzhiyun #define R_BL  gen.B.I8_reg.l_reg
129*4882a593Smuzhiyun #define R_CH  gen.C.I8_reg.h_reg
130*4882a593Smuzhiyun #define R_CL  gen.C.I8_reg.l_reg
131*4882a593Smuzhiyun #define R_DH  gen.D.I8_reg.h_reg
132*4882a593Smuzhiyun #define R_DL  gen.D.I8_reg.l_reg
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun /* 16 bit registers */
135*4882a593Smuzhiyun #define R_AX  gen.A.I16_reg.x_reg
136*4882a593Smuzhiyun #define R_BX  gen.B.I16_reg.x_reg
137*4882a593Smuzhiyun #define R_CX  gen.C.I16_reg.x_reg
138*4882a593Smuzhiyun #define R_DX  gen.D.I16_reg.x_reg
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /* 32 bit extended registers */
141*4882a593Smuzhiyun #define R_EAX  gen.A.I32_reg.e_reg
142*4882a593Smuzhiyun #define R_EBX  gen.B.I32_reg.e_reg
143*4882a593Smuzhiyun #define R_ECX  gen.C.I32_reg.e_reg
144*4882a593Smuzhiyun #define R_EDX  gen.D.I32_reg.e_reg
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /* special registers */
147*4882a593Smuzhiyun #define R_SP  spc.SP.I16_reg.x_reg
148*4882a593Smuzhiyun #define R_BP  spc.BP.I16_reg.x_reg
149*4882a593Smuzhiyun #define R_SI  spc.SI.I16_reg.x_reg
150*4882a593Smuzhiyun #define R_DI  spc.DI.I16_reg.x_reg
151*4882a593Smuzhiyun #define R_IP  spc.IP.I16_reg.x_reg
152*4882a593Smuzhiyun #define R_FLG spc.FLAGS
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun /* special registers */
155*4882a593Smuzhiyun #define R_SP  spc.SP.I16_reg.x_reg
156*4882a593Smuzhiyun #define R_BP  spc.BP.I16_reg.x_reg
157*4882a593Smuzhiyun #define R_SI  spc.SI.I16_reg.x_reg
158*4882a593Smuzhiyun #define R_DI  spc.DI.I16_reg.x_reg
159*4882a593Smuzhiyun #define R_IP  spc.IP.I16_reg.x_reg
160*4882a593Smuzhiyun #define R_FLG spc.FLAGS
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun /* special registers */
163*4882a593Smuzhiyun #define R_ESP  spc.SP.I32_reg.e_reg
164*4882a593Smuzhiyun #define R_EBP  spc.BP.I32_reg.e_reg
165*4882a593Smuzhiyun #define R_ESI  spc.SI.I32_reg.e_reg
166*4882a593Smuzhiyun #define R_EDI  spc.DI.I32_reg.e_reg
167*4882a593Smuzhiyun #define R_EIP  spc.IP.I32_reg.e_reg
168*4882a593Smuzhiyun #define R_EFLG spc.FLAGS
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun /* segment registers */
171*4882a593Smuzhiyun #define R_CS  seg.CS
172*4882a593Smuzhiyun #define R_DS  seg.DS
173*4882a593Smuzhiyun #define R_SS  seg.SS
174*4882a593Smuzhiyun #define R_ES  seg.ES
175*4882a593Smuzhiyun #define R_FS  seg.FS
176*4882a593Smuzhiyun #define R_GS  seg.GS
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun /* flag conditions   */
179*4882a593Smuzhiyun #define FB_CF 0x0001		/* CARRY flag  */
180*4882a593Smuzhiyun #define FB_PF 0x0004		/* PARITY flag */
181*4882a593Smuzhiyun #define FB_AF 0x0010		/* AUX	flag   */
182*4882a593Smuzhiyun #define FB_ZF 0x0040		/* ZERO flag   */
183*4882a593Smuzhiyun #define FB_SF 0x0080		/* SIGN flag   */
184*4882a593Smuzhiyun #define FB_TF 0x0100		/* TRAP flag   */
185*4882a593Smuzhiyun #define FB_IF 0x0200		/* INTERRUPT ENABLE flag */
186*4882a593Smuzhiyun #define FB_DF 0x0400		/* DIR flag    */
187*4882a593Smuzhiyun #define FB_OF 0x0800		/* OVERFLOW flag */
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun /* 80286 and above always have bit#1 set */
190*4882a593Smuzhiyun #define F_ALWAYS_ON  (0x0002)	/* flag bits always on */
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun /*
193*4882a593Smuzhiyun  * Define a mask for only those flag bits we will ever pass back
194*4882a593Smuzhiyun  * (via PUSHF)
195*4882a593Smuzhiyun  */
196*4882a593Smuzhiyun #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun /* following bits masked in to a 16bit quantity */
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun #define F_CF 0x0001		/* CARRY flag  */
201*4882a593Smuzhiyun #define F_PF 0x0004		/* PARITY flag */
202*4882a593Smuzhiyun #define F_AF 0x0010		/* AUX	flag   */
203*4882a593Smuzhiyun #define F_ZF 0x0040		/* ZERO flag   */
204*4882a593Smuzhiyun #define F_SF 0x0080		/* SIGN flag   */
205*4882a593Smuzhiyun #define F_TF 0x0100		/* TRAP flag   */
206*4882a593Smuzhiyun #define F_IF 0x0200		/* INTERRUPT ENABLE flag */
207*4882a593Smuzhiyun #define F_DF 0x0400		/* DIR flag    */
208*4882a593Smuzhiyun #define F_OF 0x0800		/* OVERFLOW flag */
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun #define TOGGLE_FLAG(flag)	(M.x86.R_FLG ^= (flag))
211*4882a593Smuzhiyun #define SET_FLAG(flag)		(M.x86.R_FLG |= (flag))
212*4882a593Smuzhiyun #define CLEAR_FLAG(flag)	(M.x86.R_FLG &= ~(flag))
213*4882a593Smuzhiyun #define ACCESS_FLAG(flag)	(M.x86.R_FLG & (flag))
214*4882a593Smuzhiyun #define CLEARALL_FLAG(m)	(M.x86.R_FLG = 0)
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun #define CONDITIONAL_SET_FLAG(COND,FLAG) \
217*4882a593Smuzhiyun   if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun #define F_PF_CALC 0x010000	/* PARITY flag has been calced	  */
220*4882a593Smuzhiyun #define F_ZF_CALC 0x020000	/* ZERO flag has been calced	  */
221*4882a593Smuzhiyun #define F_SF_CALC 0x040000	/* SIGN flag has been calced	  */
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun #define F_ALL_CALC	0xff0000	/* All have been calced	  */
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun /*
226*4882a593Smuzhiyun  * Emulator machine state.
227*4882a593Smuzhiyun  * Segment usage control.
228*4882a593Smuzhiyun  */
229*4882a593Smuzhiyun #define SYSMODE_SEG_DS_SS	0x00000001
230*4882a593Smuzhiyun #define SYSMODE_SEGOVR_CS	0x00000002
231*4882a593Smuzhiyun #define SYSMODE_SEGOVR_DS	0x00000004
232*4882a593Smuzhiyun #define SYSMODE_SEGOVR_ES	0x00000008
233*4882a593Smuzhiyun #define SYSMODE_SEGOVR_FS	0x00000010
234*4882a593Smuzhiyun #define SYSMODE_SEGOVR_GS	0x00000020
235*4882a593Smuzhiyun #define SYSMODE_SEGOVR_SS	0x00000040
236*4882a593Smuzhiyun #define SYSMODE_PREFIX_REPE	0x00000080
237*4882a593Smuzhiyun #define SYSMODE_PREFIX_REPNE	0x00000100
238*4882a593Smuzhiyun #define SYSMODE_PREFIX_DATA	0x00000200
239*4882a593Smuzhiyun #define SYSMODE_PREFIX_ADDR	0x00000400
240*4882a593Smuzhiyun #define SYSMODE_INTR_PENDING	0x10000000
241*4882a593Smuzhiyun #define SYSMODE_EXTRN_INTR	0x20000000
242*4882a593Smuzhiyun #define SYSMODE_HALTED		0x40000000
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS	| \
245*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_CS	| \
246*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_DS	| \
247*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_ES	| \
248*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_FS	| \
249*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_GS	| \
250*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_SS)
251*4882a593Smuzhiyun #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS	| \
252*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_CS	| \
253*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_DS	| \
254*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_ES	| \
255*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_FS	| \
256*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_GS	| \
257*4882a593Smuzhiyun 			 SYSMODE_SEGOVR_SS	| \
258*4882a593Smuzhiyun 			 SYSMODE_PREFIX_DATA	| \
259*4882a593Smuzhiyun 			 SYSMODE_PREFIX_ADDR)
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun #define	 INTR_SYNCH	      0x1
262*4882a593Smuzhiyun #define	 INTR_ASYNCH	      0x2
263*4882a593Smuzhiyun #define	 INTR_HALTED	      0x4
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun typedef struct {
266*4882a593Smuzhiyun 	struct i386_general_regs gen;
267*4882a593Smuzhiyun 	struct i386_special_regs spc;
268*4882a593Smuzhiyun 	struct i386_segment_regs seg;
269*4882a593Smuzhiyun 	/*
270*4882a593Smuzhiyun 	 * MODE contains information on:
271*4882a593Smuzhiyun 	 *  REPE prefix		    2 bits  repe,repne
272*4882a593Smuzhiyun 	 *  SEGMENT overrides	    5 bits  normal,DS,SS,CS,ES
273*4882a593Smuzhiyun 	 *  Delayed flag set	    3 bits  (zero, signed, parity)
274*4882a593Smuzhiyun 	 *  reserved		    6 bits
275*4882a593Smuzhiyun 	 *  interrupt #		    8 bits  instruction raised interrupt
276*4882a593Smuzhiyun 	 *  BIOS video segregs	    4 bits
277*4882a593Smuzhiyun 	 *  Interrupt Pending	    1 bits
278*4882a593Smuzhiyun 	 *  Extern interrupt	    1 bits
279*4882a593Smuzhiyun 	 *  Halted		    1 bits
280*4882a593Smuzhiyun 	 */
281*4882a593Smuzhiyun 	long mode;
282*4882a593Smuzhiyun 	u8 intno;
283*4882a593Smuzhiyun 	volatile int intr;	/* mask of pending interrupts */
284*4882a593Smuzhiyun 	int debug;
285*4882a593Smuzhiyun #ifdef CONFIG_X86EMU_DEBUG
286*4882a593Smuzhiyun 	int check;
287*4882a593Smuzhiyun 	u16 saved_ip;
288*4882a593Smuzhiyun 	u16 saved_cs;
289*4882a593Smuzhiyun 	int enc_pos;
290*4882a593Smuzhiyun 	int enc_str_pos;
291*4882a593Smuzhiyun 	char decode_buf[32];	/* encoded byte stream	*/
292*4882a593Smuzhiyun 	char decoded_buf[256];	/* disassembled strings */
293*4882a593Smuzhiyun #endif
294*4882a593Smuzhiyun } X86EMU_regs;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /****************************************************************************
297*4882a593Smuzhiyun REMARKS:
298*4882a593Smuzhiyun Structure maintaining the emulator machine state.
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun MEMBERS:
301*4882a593Smuzhiyun x86		- X86 registers
302*4882a593Smuzhiyun mem_base	- Base real mode memory for the emulator
303*4882a593Smuzhiyun mem_size	- Size of the real mode memory block for the emulator
304*4882a593Smuzhiyun ****************************************************************************/
305*4882a593Smuzhiyun #undef x86
306*4882a593Smuzhiyun typedef struct {
307*4882a593Smuzhiyun 	X86EMU_regs x86;
308*4882a593Smuzhiyun 	u8 *mem_base;
309*4882a593Smuzhiyun 	u32 mem_size;
310*4882a593Smuzhiyun 	void *private;
311*4882a593Smuzhiyun } X86EMU_sysEnv;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun #pragma pack()
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun /*----------------------------- Global Variables --------------------------*/
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun #ifdef	__cplusplus
318*4882a593Smuzhiyun extern "C" {			/* Use "C" linkage when in C++ mode */
319*4882a593Smuzhiyun #endif
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun /* Global emulator machine state.
322*4882a593Smuzhiyun  *
323*4882a593Smuzhiyun  * We keep it global to avoid pointer dereferences in the code for speed.
324*4882a593Smuzhiyun  */
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	extern X86EMU_sysEnv _X86EMU_env;
327*4882a593Smuzhiyun #define	  M		_X86EMU_env
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun /*-------------------------- Function Prototypes --------------------------*/
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun /* Function to log information at runtime */
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun #ifndef __KERNEL__
334*4882a593Smuzhiyun 	void printk(const char *fmt, ...);
335*4882a593Smuzhiyun #endif
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun #ifdef	__cplusplus
338*4882a593Smuzhiyun }				/* End of "C" linkage for C++	    */
339*4882a593Smuzhiyun #endif
340*4882a593Smuzhiyun #endif				/* __X86EMU_REGS_H */
341