1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * sata_dwc.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Synopsys DesignWare Cores (DWC) SATA host driver 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Author: Mark Miesfeld <mmiesfeld@amcc.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr@denx.de> 9*4882a593Smuzhiyun * Copyright 2008 DENX Software Engineering 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * Based on versions provided by AMCC and Synopsys which are: 12*4882a593Smuzhiyun * Copyright 2006 Applied Micro Circuits Corporation 13*4882a593Smuzhiyun * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun /* 18*4882a593Smuzhiyun * SATA support based on the chip canyonlands. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * 04-17-2009 21*4882a593Smuzhiyun * The local version of this driver for the canyonlands board 22*4882a593Smuzhiyun * does not use interrupts but polls the chip instead. 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #ifndef _SATA_DWC_H_ 27*4882a593Smuzhiyun #define _SATA_DWC_H_ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define __U_BOOT__ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define HZ 100 32*4882a593Smuzhiyun #define READ 0 33*4882a593Smuzhiyun #define WRITE 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun enum { 36*4882a593Smuzhiyun ATA_READID_POSTRESET = (1 << 0), 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun ATA_DNXFER_PIO = 0, 39*4882a593Smuzhiyun ATA_DNXFER_DMA = 1, 40*4882a593Smuzhiyun ATA_DNXFER_40C = 2, 41*4882a593Smuzhiyun ATA_DNXFER_FORCE_PIO = 3, 42*4882a593Smuzhiyun ATA_DNXFER_FORCE_PIO0 = 4, 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun ATA_DNXFER_QUIET = (1 << 31), 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun enum hsm_task_states { 48*4882a593Smuzhiyun HSM_ST_IDLE, 49*4882a593Smuzhiyun HSM_ST_FIRST, 50*4882a593Smuzhiyun HSM_ST, 51*4882a593Smuzhiyun HSM_ST_LAST, 52*4882a593Smuzhiyun HSM_ST_ERR, 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define ATA_SHORT_PAUSE ((HZ >> 6) + 1) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun struct ata_queued_cmd { 58*4882a593Smuzhiyun struct ata_port *ap; 59*4882a593Smuzhiyun struct ata_device *dev; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun struct ata_taskfile tf; 62*4882a593Smuzhiyun u8 cdb[ATAPI_CDB_LEN]; 63*4882a593Smuzhiyun unsigned long flags; 64*4882a593Smuzhiyun unsigned int tag; 65*4882a593Smuzhiyun unsigned int n_elem; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun int dma_dir; 68*4882a593Smuzhiyun unsigned int sect_size; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun unsigned int nbytes; 71*4882a593Smuzhiyun unsigned int extrabytes; 72*4882a593Smuzhiyun unsigned int curbytes; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun unsigned int err_mask; 75*4882a593Smuzhiyun struct ata_taskfile result_tf; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun void *private_data; 78*4882a593Smuzhiyun #ifndef __U_BOOT__ 79*4882a593Smuzhiyun void *lldd_task; 80*4882a593Smuzhiyun #endif 81*4882a593Smuzhiyun unsigned char *pdata; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define ATA_TAG_POISON 0xfafbfcfdU 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun enum { 89*4882a593Smuzhiyun LIBATA_MAX_PRD = ATA_MAX_PRD / 2, 90*4882a593Smuzhiyun LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4, 91*4882a593Smuzhiyun ATA_MAX_PORTS = 8, 92*4882a593Smuzhiyun ATA_DEF_QUEUE = 1, 93*4882a593Smuzhiyun ATA_MAX_QUEUE = 32, 94*4882a593Smuzhiyun ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1, 95*4882a593Smuzhiyun ATA_MAX_BUS = 2, 96*4882a593Smuzhiyun ATA_DEF_BUSY_WAIT = 10000, 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun ATAPI_MAX_DRAIN = 16 << 10, 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun ATA_SHT_EMULATED = 1, 101*4882a593Smuzhiyun ATA_SHT_CMD_PER_LUN = 1, 102*4882a593Smuzhiyun ATA_SHT_THIS_ID = -1, 103*4882a593Smuzhiyun ATA_SHT_USE_CLUSTERING = 1, 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun ATA_DFLAG_LBA = (1 << 0), 106*4882a593Smuzhiyun ATA_DFLAG_LBA48 = (1 << 1), 107*4882a593Smuzhiyun ATA_DFLAG_CDB_INTR = (1 << 2), 108*4882a593Smuzhiyun ATA_DFLAG_NCQ = (1 << 3), 109*4882a593Smuzhiyun ATA_DFLAG_FLUSH_EXT = (1 << 4), 110*4882a593Smuzhiyun ATA_DFLAG_ACPI_PENDING = (1 << 5), 111*4882a593Smuzhiyun ATA_DFLAG_ACPI_FAILED = (1 << 6), 112*4882a593Smuzhiyun ATA_DFLAG_AN = (1 << 7), 113*4882a593Smuzhiyun ATA_DFLAG_HIPM = (1 << 8), 114*4882a593Smuzhiyun ATA_DFLAG_DIPM = (1 << 9), 115*4882a593Smuzhiyun ATA_DFLAG_DMADIR = (1 << 10), 116*4882a593Smuzhiyun ATA_DFLAG_CFG_MASK = (1 << 12) - 1, 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun ATA_DFLAG_PIO = (1 << 12), 119*4882a593Smuzhiyun ATA_DFLAG_NCQ_OFF = (1 << 13), 120*4882a593Smuzhiyun ATA_DFLAG_SPUNDOWN = (1 << 14), 121*4882a593Smuzhiyun ATA_DFLAG_SLEEPING = (1 << 15), 122*4882a593Smuzhiyun ATA_DFLAG_DUBIOUS_XFER = (1 << 16), 123*4882a593Smuzhiyun ATA_DFLAG_INIT_MASK = (1 << 24) - 1, 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun ATA_DFLAG_DETACH = (1 << 24), 126*4882a593Smuzhiyun ATA_DFLAG_DETACHED = (1 << 25), 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun ATA_LFLAG_HRST_TO_RESUME = (1 << 0), 129*4882a593Smuzhiyun ATA_LFLAG_SKIP_D2H_BSY = (1 << 1), 130*4882a593Smuzhiyun ATA_LFLAG_NO_SRST = (1 << 2), 131*4882a593Smuzhiyun ATA_LFLAG_ASSUME_ATA = (1 << 3), 132*4882a593Smuzhiyun ATA_LFLAG_ASSUME_SEMB = (1 << 4), 133*4882a593Smuzhiyun ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB, 134*4882a593Smuzhiyun ATA_LFLAG_NO_RETRY = (1 << 5), 135*4882a593Smuzhiyun ATA_LFLAG_DISABLED = (1 << 6), 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun ATA_FLAG_SLAVE_POSS = (1 << 0), 138*4882a593Smuzhiyun ATA_FLAG_SATA = (1 << 1), 139*4882a593Smuzhiyun ATA_FLAG_NO_LEGACY = (1 << 2), 140*4882a593Smuzhiyun ATA_FLAG_MMIO = (1 << 3), 141*4882a593Smuzhiyun ATA_FLAG_SRST = (1 << 4), 142*4882a593Smuzhiyun ATA_FLAG_SATA_RESET = (1 << 5), 143*4882a593Smuzhiyun ATA_FLAG_NO_ATAPI = (1 << 6), 144*4882a593Smuzhiyun ATA_FLAG_PIO_DMA = (1 << 7), 145*4882a593Smuzhiyun ATA_FLAG_PIO_LBA48 = (1 << 8), 146*4882a593Smuzhiyun ATA_FLAG_PIO_POLLING = (1 << 9), 147*4882a593Smuzhiyun ATA_FLAG_NCQ = (1 << 10), 148*4882a593Smuzhiyun ATA_FLAG_DEBUGMSG = (1 << 13), 149*4882a593Smuzhiyun ATA_FLAG_IGN_SIMPLEX = (1 << 15), 150*4882a593Smuzhiyun ATA_FLAG_NO_IORDY = (1 << 16), 151*4882a593Smuzhiyun ATA_FLAG_ACPI_SATA = (1 << 17), 152*4882a593Smuzhiyun ATA_FLAG_AN = (1 << 18), 153*4882a593Smuzhiyun ATA_FLAG_PMP = (1 << 19), 154*4882a593Smuzhiyun ATA_FLAG_IPM = (1 << 20), 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun ATA_FLAG_DISABLED = (1 << 23), 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun ATA_PFLAG_EH_PENDING = (1 << 0), 159*4882a593Smuzhiyun ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), 160*4882a593Smuzhiyun ATA_PFLAG_FROZEN = (1 << 2), 161*4882a593Smuzhiyun ATA_PFLAG_RECOVERED = (1 << 3), 162*4882a593Smuzhiyun ATA_PFLAG_LOADING = (1 << 4), 163*4882a593Smuzhiyun ATA_PFLAG_UNLOADING = (1 << 5), 164*4882a593Smuzhiyun ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), 165*4882a593Smuzhiyun ATA_PFLAG_INITIALIZING = (1 << 7), 166*4882a593Smuzhiyun ATA_PFLAG_RESETTING = (1 << 8), 167*4882a593Smuzhiyun ATA_PFLAG_SUSPENDED = (1 << 17), 168*4882a593Smuzhiyun ATA_PFLAG_PM_PENDING = (1 << 18), 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun ATA_QCFLAG_ACTIVE = (1 << 0), 171*4882a593Smuzhiyun ATA_QCFLAG_DMAMAP = (1 << 1), 172*4882a593Smuzhiyun ATA_QCFLAG_IO = (1 << 3), 173*4882a593Smuzhiyun ATA_QCFLAG_RESULT_TF = (1 << 4), 174*4882a593Smuzhiyun ATA_QCFLAG_CLEAR_EXCL = (1 << 5), 175*4882a593Smuzhiyun ATA_QCFLAG_QUIET = (1 << 6), 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun ATA_QCFLAG_FAILED = (1 << 16), 178*4882a593Smuzhiyun ATA_QCFLAG_SENSE_VALID = (1 << 17), 179*4882a593Smuzhiyun ATA_QCFLAG_EH_SCHEDULED = (1 << 18), 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun ATA_HOST_SIMPLEX = (1 << 0), 182*4882a593Smuzhiyun ATA_HOST_STARTED = (1 << 1), 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun ATA_TMOUT_BOOT = 30 * 100, 185*4882a593Smuzhiyun ATA_TMOUT_BOOT_QUICK = 7 * 100, 186*4882a593Smuzhiyun ATA_TMOUT_INTERNAL = 30 * 100, 187*4882a593Smuzhiyun ATA_TMOUT_INTERNAL_QUICK = 5 * 100, 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun /* FIXME: GoVault needs 2s but we can't afford that without 190*4882a593Smuzhiyun * parallel probing. 800ms is enough for iVDR disk 191*4882a593Smuzhiyun * HHD424020F7SV00. Increase to 2secs when parallel probing 192*4882a593Smuzhiyun * is in place. 193*4882a593Smuzhiyun */ 194*4882a593Smuzhiyun ATA_TMOUT_FF_WAIT = 4 * 100 / 5, 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun BUS_UNKNOWN = 0, 197*4882a593Smuzhiyun BUS_DMA = 1, 198*4882a593Smuzhiyun BUS_IDLE = 2, 199*4882a593Smuzhiyun BUS_NOINTR = 3, 200*4882a593Smuzhiyun BUS_NODATA = 4, 201*4882a593Smuzhiyun BUS_TIMER = 5, 202*4882a593Smuzhiyun BUS_PIO = 6, 203*4882a593Smuzhiyun BUS_EDD = 7, 204*4882a593Smuzhiyun BUS_IDENTIFY = 8, 205*4882a593Smuzhiyun BUS_PACKET = 9, 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun PORT_UNKNOWN = 0, 208*4882a593Smuzhiyun PORT_ENABLED = 1, 209*4882a593Smuzhiyun PORT_DISABLED = 2, 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun /* encoding various smaller bitmaps into a single 212*4882a593Smuzhiyun * unsigned long bitmap 213*4882a593Smuzhiyun */ 214*4882a593Smuzhiyun ATA_NR_PIO_MODES = 7, 215*4882a593Smuzhiyun ATA_NR_MWDMA_MODES = 5, 216*4882a593Smuzhiyun ATA_NR_UDMA_MODES = 8, 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun ATA_SHIFT_PIO = 0, 219*4882a593Smuzhiyun ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES, 220*4882a593Smuzhiyun ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES, 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun ATA_DMA_PAD_SZ = 4, 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun ATA_ERING_SIZE = 32, 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun ATA_DEFER_LINK = 1, 227*4882a593Smuzhiyun ATA_DEFER_PORT = 2, 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun ATA_EH_DESC_LEN = 80, 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun ATA_EH_REVALIDATE = (1 << 0), 232*4882a593Smuzhiyun ATA_EH_SOFTRESET = (1 << 1), 233*4882a593Smuzhiyun ATA_EH_HARDRESET = (1 << 2), 234*4882a593Smuzhiyun ATA_EH_ENABLE_LINK = (1 << 3), 235*4882a593Smuzhiyun ATA_EH_LPM = (1 << 4), 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET, 238*4882a593Smuzhiyun ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE, 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun ATA_EHI_HOTPLUGGED = (1 << 0), 241*4882a593Smuzhiyun ATA_EHI_RESUME_LINK = (1 << 1), 242*4882a593Smuzhiyun ATA_EHI_NO_AUTOPSY = (1 << 2), 243*4882a593Smuzhiyun ATA_EHI_QUIET = (1 << 3), 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun ATA_EHI_DID_SOFTRESET = (1 << 16), 246*4882a593Smuzhiyun ATA_EHI_DID_HARDRESET = (1 << 17), 247*4882a593Smuzhiyun ATA_EHI_PRINTINFO = (1 << 18), 248*4882a593Smuzhiyun ATA_EHI_SETMODE = (1 << 19), 249*4882a593Smuzhiyun ATA_EHI_POST_SETMODE = (1 << 20), 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET, 252*4882a593Smuzhiyun ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK, 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun ATA_EH_MAX_TRIES = 5, 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun ATA_PROBE_MAX_TRIES = 3, 257*4882a593Smuzhiyun ATA_EH_DEV_TRIES = 3, 258*4882a593Smuzhiyun ATA_EH_PMP_TRIES = 5, 259*4882a593Smuzhiyun ATA_EH_PMP_LINK_TRIES = 3, 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun SATA_PMP_SCR_TIMEOUT = 250, 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun /* Horkage types. May be set by libata or controller on drives 264*4882a593Smuzhiyun (some horkage may be drive/controller pair dependant */ 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun ATA_HORKAGE_DIAGNOSTIC = (1 << 0), 267*4882a593Smuzhiyun ATA_HORKAGE_NODMA = (1 << 1), 268*4882a593Smuzhiyun ATA_HORKAGE_NONCQ = (1 << 2), 269*4882a593Smuzhiyun ATA_HORKAGE_MAX_SEC_128 = (1 << 3), 270*4882a593Smuzhiyun ATA_HORKAGE_BROKEN_HPA = (1 << 4), 271*4882a593Smuzhiyun ATA_HORKAGE_SKIP_PM = (1 << 5), 272*4882a593Smuzhiyun ATA_HORKAGE_HPA_SIZE = (1 << 6), 273*4882a593Smuzhiyun ATA_HORKAGE_IPM = (1 << 7), 274*4882a593Smuzhiyun ATA_HORKAGE_IVB = (1 << 8), 275*4882a593Smuzhiyun ATA_HORKAGE_STUCK_ERR = (1 << 9), 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun ATA_DMA_MASK_ATA = (1 << 0), 278*4882a593Smuzhiyun ATA_DMA_MASK_ATAPI = (1 << 1), 279*4882a593Smuzhiyun ATA_DMA_MASK_CFA = (1 << 2), 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun ATAPI_READ = 0, 282*4882a593Smuzhiyun ATAPI_WRITE = 1, 283*4882a593Smuzhiyun ATAPI_READ_CD = 2, 284*4882a593Smuzhiyun ATAPI_PASS_THRU = 3, 285*4882a593Smuzhiyun ATAPI_MISC = 4, 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun enum ata_completion_errors { 289*4882a593Smuzhiyun AC_ERR_DEV = (1 << 0), 290*4882a593Smuzhiyun AC_ERR_HSM = (1 << 1), 291*4882a593Smuzhiyun AC_ERR_TIMEOUT = (1 << 2), 292*4882a593Smuzhiyun AC_ERR_MEDIA = (1 << 3), 293*4882a593Smuzhiyun AC_ERR_ATA_BUS = (1 << 4), 294*4882a593Smuzhiyun AC_ERR_HOST_BUS = (1 << 5), 295*4882a593Smuzhiyun AC_ERR_SYSTEM = (1 << 6), 296*4882a593Smuzhiyun AC_ERR_INVALID = (1 << 7), 297*4882a593Smuzhiyun AC_ERR_OTHER = (1 << 8), 298*4882a593Smuzhiyun AC_ERR_NODEV_HINT = (1 << 9), 299*4882a593Smuzhiyun AC_ERR_NCQ = (1 << 10), 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun enum ata_xfer_mask { 303*4882a593Smuzhiyun ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO, 304*4882a593Smuzhiyun ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA, 305*4882a593Smuzhiyun ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA, 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun struct ata_port_info { 309*4882a593Smuzhiyun #ifndef __U_BOOT__ 310*4882a593Smuzhiyun struct scsi_host_template *sht; 311*4882a593Smuzhiyun #endif 312*4882a593Smuzhiyun unsigned long flags; 313*4882a593Smuzhiyun unsigned long link_flags; 314*4882a593Smuzhiyun unsigned long pio_mask; 315*4882a593Smuzhiyun unsigned long mwdma_mask; 316*4882a593Smuzhiyun unsigned long udma_mask; 317*4882a593Smuzhiyun #ifndef __U_BOOT__ 318*4882a593Smuzhiyun const struct ata_port_operations *port_ops; 319*4882a593Smuzhiyun void *private_data; 320*4882a593Smuzhiyun #endif 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun struct ata_ioports { 324*4882a593Smuzhiyun void __iomem *cmd_addr; 325*4882a593Smuzhiyun void __iomem *data_addr; 326*4882a593Smuzhiyun void __iomem *error_addr; 327*4882a593Smuzhiyun void __iomem *feature_addr; 328*4882a593Smuzhiyun void __iomem *nsect_addr; 329*4882a593Smuzhiyun void __iomem *lbal_addr; 330*4882a593Smuzhiyun void __iomem *lbam_addr; 331*4882a593Smuzhiyun void __iomem *lbah_addr; 332*4882a593Smuzhiyun void __iomem *device_addr; 333*4882a593Smuzhiyun void __iomem *status_addr; 334*4882a593Smuzhiyun void __iomem *command_addr; 335*4882a593Smuzhiyun void __iomem *altstatus_addr; 336*4882a593Smuzhiyun void __iomem *ctl_addr; 337*4882a593Smuzhiyun #ifndef __U_BOOT__ 338*4882a593Smuzhiyun void __iomem *bmdma_addr; 339*4882a593Smuzhiyun #endif 340*4882a593Smuzhiyun void __iomem *scr_addr; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun struct ata_host { 344*4882a593Smuzhiyun #ifndef __U_BOOT__ 345*4882a593Smuzhiyun void __iomem * const *iomap; 346*4882a593Smuzhiyun void *private_data; 347*4882a593Smuzhiyun const struct ata_port_operations *ops; 348*4882a593Smuzhiyun unsigned long flags; 349*4882a593Smuzhiyun struct ata_port *simplex_claimed; 350*4882a593Smuzhiyun #endif 351*4882a593Smuzhiyun unsigned int n_ports; 352*4882a593Smuzhiyun struct ata_port *ports[0]; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun #ifndef __U_BOOT__ 356*4882a593Smuzhiyun struct ata_port_stats { 357*4882a593Smuzhiyun unsigned long unhandled_irq; 358*4882a593Smuzhiyun unsigned long idle_irq; 359*4882a593Smuzhiyun unsigned long rw_reqbuf; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun #endif 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun struct ata_device { 364*4882a593Smuzhiyun struct ata_link *link; 365*4882a593Smuzhiyun unsigned int devno; 366*4882a593Smuzhiyun unsigned long flags; 367*4882a593Smuzhiyun unsigned int horkage; 368*4882a593Smuzhiyun #ifndef __U_BOOT__ 369*4882a593Smuzhiyun struct scsi_device *sdev; 370*4882a593Smuzhiyun #ifdef CONFIG_ATA_ACPI 371*4882a593Smuzhiyun acpi_handle acpi_handle; 372*4882a593Smuzhiyun union acpi_object *gtf_cache; 373*4882a593Smuzhiyun #endif 374*4882a593Smuzhiyun #endif 375*4882a593Smuzhiyun u64 n_sectors; 376*4882a593Smuzhiyun unsigned int class; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun union { 379*4882a593Smuzhiyun u16 id[ATA_ID_WORDS]; 380*4882a593Smuzhiyun u32 gscr[SATA_PMP_GSCR_DWORDS]; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun #ifndef __U_BOOT__ 383*4882a593Smuzhiyun u8 pio_mode; 384*4882a593Smuzhiyun u8 dma_mode; 385*4882a593Smuzhiyun u8 xfer_mode; 386*4882a593Smuzhiyun unsigned int xfer_shift; 387*4882a593Smuzhiyun #endif 388*4882a593Smuzhiyun unsigned int multi_count; 389*4882a593Smuzhiyun unsigned int max_sectors; 390*4882a593Smuzhiyun unsigned int cdb_len; 391*4882a593Smuzhiyun #ifndef __U_BOOT__ 392*4882a593Smuzhiyun unsigned long pio_mask; 393*4882a593Smuzhiyun unsigned long mwdma_mask; 394*4882a593Smuzhiyun #endif 395*4882a593Smuzhiyun unsigned long udma_mask; 396*4882a593Smuzhiyun u16 cylinders; 397*4882a593Smuzhiyun u16 heads; 398*4882a593Smuzhiyun u16 sectors; 399*4882a593Smuzhiyun #ifndef __U_BOOT__ 400*4882a593Smuzhiyun int spdn_cnt; 401*4882a593Smuzhiyun #endif 402*4882a593Smuzhiyun }; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun struct ata_link { 405*4882a593Smuzhiyun struct ata_port *ap; 406*4882a593Smuzhiyun int pmp; 407*4882a593Smuzhiyun unsigned int active_tag; 408*4882a593Smuzhiyun u32 sactive; 409*4882a593Smuzhiyun unsigned int flags; 410*4882a593Smuzhiyun unsigned int hw_sata_spd_limit; 411*4882a593Smuzhiyun #ifndef __U_BOOT__ 412*4882a593Smuzhiyun unsigned int sata_spd_limit; 413*4882a593Smuzhiyun unsigned int sata_spd; 414*4882a593Smuzhiyun struct ata_device device[2]; 415*4882a593Smuzhiyun #endif 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun struct ata_port { 419*4882a593Smuzhiyun unsigned long flags; 420*4882a593Smuzhiyun unsigned int pflags; 421*4882a593Smuzhiyun unsigned int print_id; 422*4882a593Smuzhiyun unsigned int port_no; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun struct ata_ioports ioaddr; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun u8 ctl; 427*4882a593Smuzhiyun u8 last_ctl; 428*4882a593Smuzhiyun unsigned int pio_mask; 429*4882a593Smuzhiyun unsigned int mwdma_mask; 430*4882a593Smuzhiyun unsigned int udma_mask; 431*4882a593Smuzhiyun unsigned int cbl; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; 434*4882a593Smuzhiyun unsigned long qc_allocated; 435*4882a593Smuzhiyun unsigned int qc_active; 436*4882a593Smuzhiyun int nr_active_links; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun struct ata_link link; 439*4882a593Smuzhiyun #ifndef __U_BOOT__ 440*4882a593Smuzhiyun int nr_pmp_links; 441*4882a593Smuzhiyun struct ata_link *pmp_link; 442*4882a593Smuzhiyun #endif 443*4882a593Smuzhiyun struct ata_link *excl_link; 444*4882a593Smuzhiyun int nr_pmp_links; 445*4882a593Smuzhiyun #ifndef __U_BOOT__ 446*4882a593Smuzhiyun struct ata_port_stats stats; 447*4882a593Smuzhiyun struct device *dev; 448*4882a593Smuzhiyun u32 msg_enable; 449*4882a593Smuzhiyun #endif 450*4882a593Smuzhiyun struct ata_host *host; 451*4882a593Smuzhiyun void *port_task_data; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun unsigned int hsm_task_state; 454*4882a593Smuzhiyun void *private_data; 455*4882a593Smuzhiyun unsigned char *pdata; 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun #endif 459