xref: /OK3568_Linux_fs/u-boot/drivers/adc/adc-uclass.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2015 Samsung Electronics
3*4882a593Smuzhiyun  * Przemyslaw Marczak <p.marczak@samsung.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <errno.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <dm/lists.h>
12*4882a593Smuzhiyun #include <dm/device-internal.h>
13*4882a593Smuzhiyun #include <dm/uclass-internal.h>
14*4882a593Smuzhiyun #include <adc.h>
15*4882a593Smuzhiyun #include <power/regulator.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define ADC_UCLASS_PLATDATA_SIZE	sizeof(struct adc_uclass_platdata)
20*4882a593Smuzhiyun #define CHECK_NUMBER			true
21*4882a593Smuzhiyun #define CHECK_MASK			(!CHECK_NUMBER)
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* TODO: add support for timer uclass (for early calls) */
24*4882a593Smuzhiyun #ifdef CONFIG_SANDBOX_ARCH
25*4882a593Smuzhiyun #define sdelay(x)	udelay(x)
26*4882a593Smuzhiyun #else
27*4882a593Smuzhiyun extern void sdelay(unsigned long loops);
28*4882a593Smuzhiyun #endif
29*4882a593Smuzhiyun 
check_channel(struct udevice * dev,int value,bool number_or_mask,const char * caller_function)30*4882a593Smuzhiyun static int check_channel(struct udevice *dev, int value, bool number_or_mask,
31*4882a593Smuzhiyun 			 const char *caller_function)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
34*4882a593Smuzhiyun 	unsigned mask = number_or_mask ? (1 << value) : value;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	/* For the real ADC hardware, some ADC channels can be inactive.
37*4882a593Smuzhiyun 	 * For example if device has 4 analog channels, and only channels
38*4882a593Smuzhiyun 	 * 1-st and 3-rd are valid, then channel mask is: 0b1010, so request
39*4882a593Smuzhiyun 	 * with mask 0b1110 should return an error.
40*4882a593Smuzhiyun 	*/
41*4882a593Smuzhiyun 	if ((uc_pdata->channel_mask >= mask) && (uc_pdata->channel_mask & mask))
42*4882a593Smuzhiyun 		return 0;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	printf("Error in %s/%s().\nWrong channel selection for device: %s\n",
45*4882a593Smuzhiyun 	       __FILE__, caller_function, dev->name);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	return -EINVAL;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #ifdef CONFIG_ADC_REQ_REGULATOR
adc_supply_enable(struct udevice * dev)51*4882a593Smuzhiyun static int adc_supply_enable(struct udevice *dev)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
54*4882a593Smuzhiyun 	const char *supply_type;
55*4882a593Smuzhiyun 	int ret = 0;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	if (uc_pdata->vdd_supply) {
58*4882a593Smuzhiyun 		supply_type = "vdd";
59*4882a593Smuzhiyun 		ret = regulator_set_enable(uc_pdata->vdd_supply, true);
60*4882a593Smuzhiyun 	}
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	if (!ret && uc_pdata->vss_supply) {
63*4882a593Smuzhiyun 		supply_type = "vss";
64*4882a593Smuzhiyun 		ret = regulator_set_enable(uc_pdata->vss_supply, true);
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	if (ret)
68*4882a593Smuzhiyun 		pr_err("%s: can't enable %s-supply!", dev->name, supply_type);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	return ret;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun #else
adc_supply_enable(struct udevice * dev)73*4882a593Smuzhiyun static inline int adc_supply_enable(struct udevice *dev) { return 0; }
74*4882a593Smuzhiyun #endif
75*4882a593Smuzhiyun 
adc_data_mask(struct udevice * dev,unsigned int * data_mask)76*4882a593Smuzhiyun int adc_data_mask(struct udevice *dev, unsigned int *data_mask)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if (!uc_pdata)
81*4882a593Smuzhiyun 		return -ENOSYS;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	*data_mask = uc_pdata->data_mask;
84*4882a593Smuzhiyun 	return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
adc_stop(struct udevice * dev)87*4882a593Smuzhiyun int adc_stop(struct udevice *dev)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	const struct adc_ops *ops = dev_get_driver_ops(dev);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	if (!ops->stop)
92*4882a593Smuzhiyun 		return -ENOSYS;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	return ops->stop(dev);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
adc_start_channel(struct udevice * dev,int channel)97*4882a593Smuzhiyun int adc_start_channel(struct udevice *dev, int channel)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	const struct adc_ops *ops = dev_get_driver_ops(dev);
100*4882a593Smuzhiyun 	int ret;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	if (!ops->start_channel)
103*4882a593Smuzhiyun 		return -ENOSYS;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	ret = check_channel(dev, channel, CHECK_NUMBER, __func__);
106*4882a593Smuzhiyun 	if (ret)
107*4882a593Smuzhiyun 		return ret;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	ret = adc_supply_enable(dev);
110*4882a593Smuzhiyun 	if (ret)
111*4882a593Smuzhiyun 		return ret;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	return ops->start_channel(dev, channel);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
adc_start_channels(struct udevice * dev,unsigned int channel_mask)116*4882a593Smuzhiyun int adc_start_channels(struct udevice *dev, unsigned int channel_mask)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	const struct adc_ops *ops = dev_get_driver_ops(dev);
119*4882a593Smuzhiyun 	int ret;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	if (!ops->start_channels)
122*4882a593Smuzhiyun 		return -ENOSYS;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	ret = check_channel(dev, channel_mask, CHECK_MASK, __func__);
125*4882a593Smuzhiyun 	if (ret)
126*4882a593Smuzhiyun 		return ret;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	ret = adc_supply_enable(dev);
129*4882a593Smuzhiyun 	if (ret)
130*4882a593Smuzhiyun 		return ret;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	return ops->start_channels(dev, channel_mask);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
adc_channel_data(struct udevice * dev,int channel,unsigned int * data)135*4882a593Smuzhiyun int adc_channel_data(struct udevice *dev, int channel, unsigned int *data)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
138*4882a593Smuzhiyun 	const struct adc_ops *ops = dev_get_driver_ops(dev);
139*4882a593Smuzhiyun 	unsigned int timeout_us = uc_pdata->data_timeout_us;
140*4882a593Smuzhiyun 	int ret;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (!ops->channel_data)
143*4882a593Smuzhiyun 		return -ENOSYS;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	ret = check_channel(dev, channel, CHECK_NUMBER, __func__);
146*4882a593Smuzhiyun 	if (ret)
147*4882a593Smuzhiyun 		return ret;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	do {
150*4882a593Smuzhiyun 		ret = ops->channel_data(dev, channel, data);
151*4882a593Smuzhiyun 		if (!ret || ret != -EBUSY)
152*4882a593Smuzhiyun 			break;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 		/* TODO: use timer uclass (for early calls). */
155*4882a593Smuzhiyun 		sdelay(5);
156*4882a593Smuzhiyun 	} while (timeout_us--);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	return ret;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
adc_channels_data(struct udevice * dev,unsigned int channel_mask,struct adc_channel * channels)161*4882a593Smuzhiyun int adc_channels_data(struct udevice *dev, unsigned int channel_mask,
162*4882a593Smuzhiyun 		      struct adc_channel *channels)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
165*4882a593Smuzhiyun 	unsigned int timeout_us = uc_pdata->multidata_timeout_us;
166*4882a593Smuzhiyun 	const struct adc_ops *ops = dev_get_driver_ops(dev);
167*4882a593Smuzhiyun 	int ret;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	if (!ops->channels_data)
170*4882a593Smuzhiyun 		return -ENOSYS;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	ret = check_channel(dev, channel_mask, CHECK_MASK, __func__);
173*4882a593Smuzhiyun 	if (ret)
174*4882a593Smuzhiyun 		return ret;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	do {
177*4882a593Smuzhiyun 		ret = ops->channels_data(dev, channel_mask, channels);
178*4882a593Smuzhiyun 		if (!ret || ret != -EBUSY)
179*4882a593Smuzhiyun 			break;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 		/* TODO: use timer uclass (for early calls). */
182*4882a593Smuzhiyun 		sdelay(5);
183*4882a593Smuzhiyun 	} while (timeout_us--);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	return ret;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun 
adc_channel_single_shot(const char * name,int channel,unsigned int * data)188*4882a593Smuzhiyun int adc_channel_single_shot(const char *name, int channel, unsigned int *data)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	struct udevice *dev;
191*4882a593Smuzhiyun 	int ret;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	ret = uclass_get_device_by_name(UCLASS_ADC, name, &dev);
194*4882a593Smuzhiyun 	if (ret)
195*4882a593Smuzhiyun 		return ret;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	ret = adc_start_channel(dev, channel);
198*4882a593Smuzhiyun 	if (ret)
199*4882a593Smuzhiyun 		return ret;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	ret = adc_channel_data(dev, channel, data);
202*4882a593Smuzhiyun 	if (ret)
203*4882a593Smuzhiyun 		return ret;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	return 0;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
_adc_channels_single_shot(struct udevice * dev,unsigned int channel_mask,struct adc_channel * channels)208*4882a593Smuzhiyun static int _adc_channels_single_shot(struct udevice *dev,
209*4882a593Smuzhiyun 				     unsigned int channel_mask,
210*4882a593Smuzhiyun 				     struct adc_channel *channels)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	unsigned int data;
213*4882a593Smuzhiyun 	int channel, ret;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	for (channel = 0; channel <= ADC_MAX_CHANNEL; channel++) {
216*4882a593Smuzhiyun 		/* Check channel bit. */
217*4882a593Smuzhiyun 		if (!((channel_mask >> channel) & 0x1))
218*4882a593Smuzhiyun 			continue;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 		ret = adc_start_channel(dev, channel);
221*4882a593Smuzhiyun 		if (ret)
222*4882a593Smuzhiyun 			return ret;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 		ret = adc_channel_data(dev, channel, &data);
225*4882a593Smuzhiyun 		if (ret)
226*4882a593Smuzhiyun 			return ret;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 		channels->id = channel;
229*4882a593Smuzhiyun 		channels->data = data;
230*4882a593Smuzhiyun 		channels++;
231*4882a593Smuzhiyun 	}
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	return 0;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun 
adc_channels_single_shot(const char * name,unsigned int channel_mask,struct adc_channel * channels)236*4882a593Smuzhiyun int adc_channels_single_shot(const char *name, unsigned int channel_mask,
237*4882a593Smuzhiyun 			     struct adc_channel *channels)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	struct udevice *dev;
240*4882a593Smuzhiyun 	int ret;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	ret = uclass_get_device_by_name(UCLASS_ADC, name, &dev);
243*4882a593Smuzhiyun 	if (ret)
244*4882a593Smuzhiyun 		return ret;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	ret = adc_start_channels(dev, channel_mask);
247*4882a593Smuzhiyun 	if (ret)
248*4882a593Smuzhiyun 		goto try_manual;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	ret = adc_channels_data(dev, channel_mask, channels);
251*4882a593Smuzhiyun 	if (ret)
252*4882a593Smuzhiyun 		return ret;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	return 0;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun try_manual:
257*4882a593Smuzhiyun 	if (ret != -ENOSYS)
258*4882a593Smuzhiyun 		return ret;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	return _adc_channels_single_shot(dev, channel_mask, channels);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun #ifdef CONFIG_ADC_REQ_REGULATOR
adc_vdd_platdata_update(struct udevice * dev)264*4882a593Smuzhiyun static int adc_vdd_platdata_update(struct udevice *dev)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
267*4882a593Smuzhiyun 	int ret;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* Warning!
270*4882a593Smuzhiyun 	 * This function can't return supply device before its bind.
271*4882a593Smuzhiyun 	 * Please pay attention to proper fdt scan sequence. If ADC device
272*4882a593Smuzhiyun 	 * will bind before its supply regulator device, then the below 'get'
273*4882a593Smuzhiyun 	 * will return an error.
274*4882a593Smuzhiyun 	 */
275*4882a593Smuzhiyun 	ret = device_get_supply_regulator(dev, "vdd-supply",
276*4882a593Smuzhiyun 					  &uc_pdata->vdd_supply);
277*4882a593Smuzhiyun 	if (ret)
278*4882a593Smuzhiyun 		return ret;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	ret = regulator_get_value(uc_pdata->vdd_supply);
281*4882a593Smuzhiyun 	if (ret < 0)
282*4882a593Smuzhiyun 		return ret;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	uc_pdata->vdd_microvolts = ret;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun #else
adc_vdd_platdata_update(struct udevice * dev)289*4882a593Smuzhiyun static inline int adc_vdd_platdata_update(struct udevice *dev) { return 0; }
290*4882a593Smuzhiyun #endif
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun #ifdef CONFIG_ADC_REQ_REGULATOR
adc_vss_platdata_update(struct udevice * dev)293*4882a593Smuzhiyun static int adc_vss_platdata_update(struct udevice *dev)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
296*4882a593Smuzhiyun 	int ret;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	ret = device_get_supply_regulator(dev, "vss-supply",
299*4882a593Smuzhiyun 					  &uc_pdata->vss_supply);
300*4882a593Smuzhiyun 	if (ret)
301*4882a593Smuzhiyun 		return ret;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	ret = regulator_get_value(uc_pdata->vss_supply);
304*4882a593Smuzhiyun 	if (ret < 0)
305*4882a593Smuzhiyun 		return ret;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	uc_pdata->vss_microvolts = ret;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun #else
adc_vss_platdata_update(struct udevice * dev)312*4882a593Smuzhiyun static inline int adc_vss_platdata_update(struct udevice *dev) { return 0; }
313*4882a593Smuzhiyun #endif
314*4882a593Smuzhiyun 
adc_vdd_value(struct udevice * dev,int * uV)315*4882a593Smuzhiyun int adc_vdd_value(struct udevice *dev, int *uV)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
318*4882a593Smuzhiyun 	int ret, value_sign = uc_pdata->vdd_polarity_negative ? -1 : 1;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	if (!uc_pdata->vdd_supply)
321*4882a593Smuzhiyun 		goto nodev;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* Update the regulator Value. */
324*4882a593Smuzhiyun 	ret = adc_vdd_platdata_update(dev);
325*4882a593Smuzhiyun 	if (ret)
326*4882a593Smuzhiyun 		return ret;
327*4882a593Smuzhiyun nodev:
328*4882a593Smuzhiyun 	if (uc_pdata->vdd_microvolts == -ENODATA)
329*4882a593Smuzhiyun 		return -ENODATA;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	*uV = uc_pdata->vdd_microvolts * value_sign;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	return 0;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun 
adc_vss_value(struct udevice * dev,int * uV)336*4882a593Smuzhiyun int adc_vss_value(struct udevice *dev, int *uV)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
339*4882a593Smuzhiyun 	int ret, value_sign = uc_pdata->vss_polarity_negative ? -1 : 1;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	if (!uc_pdata->vss_supply)
342*4882a593Smuzhiyun 		goto nodev;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	/* Update the regulator Value. */
345*4882a593Smuzhiyun 	ret = adc_vss_platdata_update(dev);
346*4882a593Smuzhiyun 	if (ret)
347*4882a593Smuzhiyun 		return ret;
348*4882a593Smuzhiyun nodev:
349*4882a593Smuzhiyun 	if (uc_pdata->vss_microvolts == -ENODATA)
350*4882a593Smuzhiyun 		return -ENODATA;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	*uV = uc_pdata->vss_microvolts * value_sign;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	return 0;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun 
adc_vdd_platdata_set(struct udevice * dev)357*4882a593Smuzhiyun static int adc_vdd_platdata_set(struct udevice *dev)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
360*4882a593Smuzhiyun 	int ret;
361*4882a593Smuzhiyun 	char *prop;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	prop = "vdd-polarity-negative";
364*4882a593Smuzhiyun 	uc_pdata->vdd_polarity_negative = dev_read_bool(dev, prop);
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	ret = adc_vdd_platdata_update(dev);
367*4882a593Smuzhiyun 	if (ret != -ENOENT)
368*4882a593Smuzhiyun 		return ret;
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	/* No vdd-supply phandle. */
371*4882a593Smuzhiyun 	prop  = "vdd-microvolts";
372*4882a593Smuzhiyun 	uc_pdata->vdd_microvolts = dev_read_u32_default(dev, prop, -ENODATA);
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	return 0;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun 
adc_vss_platdata_set(struct udevice * dev)377*4882a593Smuzhiyun static int adc_vss_platdata_set(struct udevice *dev)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
380*4882a593Smuzhiyun 	int ret;
381*4882a593Smuzhiyun 	char *prop;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	prop = "vss-polarity-negative";
384*4882a593Smuzhiyun 	uc_pdata->vss_polarity_negative = dev_read_bool(dev, prop);
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	ret = adc_vss_platdata_update(dev);
387*4882a593Smuzhiyun 	if (ret != -ENOENT)
388*4882a593Smuzhiyun 		return ret;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	/* No vss-supply phandle. */
391*4882a593Smuzhiyun 	prop = "vss-microvolts";
392*4882a593Smuzhiyun 	uc_pdata->vss_microvolts = dev_read_u32_default(dev, prop, -ENODATA);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	return 0;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun 
adc_pre_probe(struct udevice * dev)397*4882a593Smuzhiyun static int adc_pre_probe(struct udevice *dev)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	int ret;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	/* Set ADC VDD platdata: polarity, uV, regulator (phandle). */
402*4882a593Smuzhiyun 	ret = adc_vdd_platdata_set(dev);
403*4882a593Smuzhiyun 	if (ret)
404*4882a593Smuzhiyun 		pr_err("%s: Can't update Vdd. Error: %d", dev->name, ret);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	/* Set ADC VSS platdata: polarity, uV, regulator (phandle). */
407*4882a593Smuzhiyun 	ret = adc_vss_platdata_set(dev);
408*4882a593Smuzhiyun 	if (ret)
409*4882a593Smuzhiyun 		pr_err("%s: Can't update Vss. Error: %d", dev->name, ret);
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	return 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun UCLASS_DRIVER(adc) = {
415*4882a593Smuzhiyun 	.id	= UCLASS_ADC,
416*4882a593Smuzhiyun 	.name	= "adc",
417*4882a593Smuzhiyun 	.pre_probe =  adc_pre_probe,
418*4882a593Smuzhiyun 	.per_device_platdata_auto_alloc_size = ADC_UCLASS_PLATDATA_SIZE,
419*4882a593Smuzhiyun };
420