1*4882a593SmuzhiyunIntel GMA Bindings 2*4882a593Smuzhiyun================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis is the Intel Graphics Media Accelerator. This binding supports selection 5*4882a593Smuzhiyunof display parameters only. 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun - compatible : "intel,gma"; 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunOptional properties: 12*4882a593Smuzhiyun - intel,dp-hotplug : values for digital port hotplug, one cell per value for 13*4882a593Smuzhiyun ports B, C and D 14*4882a593Smuzhiyun - intel,panel-port-select : output port to use: 0=LVDS 1=DP_B 2=DP_C 3=DP_D 15*4882a593Smuzhiyun - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun The following delays are in units of 0.1ms: 18*4882a593Smuzhiyun - intel,panel-power-up-delay : T1+T2 time sequence 19*4882a593Smuzhiyun - intel,panel-power-down-delay : T3 time sequence 20*4882a593Smuzhiyun - intel,panel-power-backlight-on-delay : T5 time sequence 21*4882a593Smuzhiyun - intel,panel-power-backlight-off-delay : Tx time sequence 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun - intel,cpu-backlight : Value for CPU Backlight PWM 24*4882a593Smuzhiyun - intel,pch-backlight : Value for PCH Backlight PWM 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExample 27*4882a593Smuzhiyun------- 28*4882a593Smuzhiyun 29*4882a593Smuzhiyungma { 30*4882a593Smuzhiyun compatible = "intel,gma"; 31*4882a593Smuzhiyun intel,dp_hotplug = <0 0 0x06>; 32*4882a593Smuzhiyun intel,panel-port-select = <1>; 33*4882a593Smuzhiyun intel,panel-power-cycle-delay = <6>; 34*4882a593Smuzhiyun intel,panel-power-up-delay = <2000>; 35*4882a593Smuzhiyun intel,panel-power-down-delay = <500>; 36*4882a593Smuzhiyun intel,panel-power-backlight-on-delay = <2000>; 37*4882a593Smuzhiyun intel,panel-power-backlight-off-delay = <2000>; 38*4882a593Smuzhiyun intel,cpu-backlight = <0x00000200>; 39*4882a593Smuzhiyun intel,pch-backlight = <0x04000000>; 40*4882a593Smuzhiyun}; 41