1*4882a593Smuzhiyun* Temperature Sensor ADC (TSADC) on rockchip SoCs 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible : "rockchip,rk3288-tsadc" 5*4882a593Smuzhiyun- reg : physical base address of the controller and length of memory mapped 6*4882a593Smuzhiyun region. 7*4882a593Smuzhiyun- interrupts : The interrupt number to the cpu. The interrupt specifier format 8*4882a593Smuzhiyun depends on the interrupt controller. 9*4882a593Smuzhiyun- clocks : Must contain an entry for each entry in clock-names. 10*4882a593Smuzhiyun- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for 11*4882a593Smuzhiyun the peripheral clock. 12*4882a593Smuzhiyun- resets : Must contain an entry for each entry in reset-names. 13*4882a593Smuzhiyun See ../reset/reset.txt for details. 14*4882a593Smuzhiyun- reset-names : Must include the name "tsadc-apb". 15*4882a593Smuzhiyun- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. 16*4882a593Smuzhiyun- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. 17*4882a593Smuzhiyun- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. 18*4882a593Smuzhiyun- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW 19*4882a593Smuzhiyun 1:HIGH. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExiample: 22*4882a593Smuzhiyuntsadc: tsadc@ff280000 { 23*4882a593Smuzhiyun compatible = "rockchip,rk3288-tsadc"; 24*4882a593Smuzhiyun reg = <0xff280000 0x100>; 25*4882a593Smuzhiyun interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 26*4882a593Smuzhiyun clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; 27*4882a593Smuzhiyun clock-names = "tsadc", "apb_pclk"; 28*4882a593Smuzhiyun resets = <&cru SRST_TSADC>; 29*4882a593Smuzhiyun reset-names = "tsadc-apb"; 30*4882a593Smuzhiyun pinctrl-names = "default"; 31*4882a593Smuzhiyun pinctrl-0 = <&otp_out>; 32*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 33*4882a593Smuzhiyun rockchip,hw-tshut-temp = <95000>; 34*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; 35*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunExample: referring to thermal sensors: 39*4882a593Smuzhiyunthermal-zones { 40*4882a593Smuzhiyun cpu_thermal: cpu_thermal { 41*4882a593Smuzhiyun polling-delay-passive = <1000>; /* milliseconds */ 42*4882a593Smuzhiyun polling-delay = <5000>; /* milliseconds */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* sensor ID */ 45*4882a593Smuzhiyun thermal-sensors = <&tsadc 1>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun trips { 48*4882a593Smuzhiyun cpu_alert0: cpu_alert { 49*4882a593Smuzhiyun temperature = <70000>; /* millicelsius */ 50*4882a593Smuzhiyun hysteresis = <2000>; /* millicelsius */ 51*4882a593Smuzhiyun type = "passive"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun cpu_crit: cpu_crit { 54*4882a593Smuzhiyun temperature = <90000>; /* millicelsius */ 55*4882a593Smuzhiyun hysteresis = <2000>; /* millicelsius */ 56*4882a593Smuzhiyun type = "critical"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun cooling-maps { 61*4882a593Smuzhiyun map0 { 62*4882a593Smuzhiyun trip = <&cpu_alert0>; 63*4882a593Smuzhiyun cooling-device = 64*4882a593Smuzhiyun <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun}; 69