1*4882a593SmuzhiyunCommon i2c bus multiplexer/switch properties. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunAn i2c bus multiplexer/switch will have several child busses that are 4*4882a593Smuzhiyunnumbered uniquely in a device dependent manner. The nodes for an i2c bus 5*4882a593Smuzhiyunmultiplexer/switch will have one child node for each child 6*4882a593Smuzhiyunbus. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- #address-cells = <1>; 10*4882a593Smuzhiyun- #size-cells = <0>; 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRequired properties for child nodes: 13*4882a593Smuzhiyun- #address-cells = <1>; 14*4882a593Smuzhiyun- #size-cells = <0>; 15*4882a593Smuzhiyun- reg : The sub-bus number. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunOptional properties for child nodes: 18*4882a593Smuzhiyun- Other properties specific to the multiplexer/switch hardware. 19*4882a593Smuzhiyun- Child nodes conforming to i2c bus binding 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunExample : 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun An NXP pca9548 8 channel I2C multiplexer at address 0x70 26*4882a593Smuzhiyun with two NXP pca8574 GPIO expanders attached, one each to 27*4882a593Smuzhiyun ports 3 and 4. 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun mux@70 { 31*4882a593Smuzhiyun compatible = "nxp,pca9548"; 32*4882a593Smuzhiyun reg = <0x70>; 33*4882a593Smuzhiyun #address-cells = <1>; 34*4882a593Smuzhiyun #size-cells = <0>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun i2c@3 { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <0>; 39*4882a593Smuzhiyun reg = <3>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun gpio1: gpio@38 { 42*4882a593Smuzhiyun compatible = "nxp,pca8574"; 43*4882a593Smuzhiyun reg = <0x38>; 44*4882a593Smuzhiyun #gpio-cells = <2>; 45*4882a593Smuzhiyun gpio-controller; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun i2c@4 { 49*4882a593Smuzhiyun #address-cells = <1>; 50*4882a593Smuzhiyun #size-cells = <0>; 51*4882a593Smuzhiyun reg = <4>; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun gpio2: gpio@38 { 54*4882a593Smuzhiyun compatible = "nxp,pca8574"; 55*4882a593Smuzhiyun reg = <0x38>; 56*4882a593Smuzhiyun #gpio-cells = <2>; 57*4882a593Smuzhiyun gpio-controller; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61