1*4882a593SmuzhiyunI2C for Atmel platforms 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties : 4*4882a593Smuzhiyun- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c", 5*4882a593Smuzhiyun "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c", 6*4882a593Smuzhiyun "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c". 7*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 8*4882a593Smuzhiyun region. 9*4882a593Smuzhiyun- #address-cells = <1>; 10*4882a593Smuzhiyun- #size-cells = <0>; 11*4882a593Smuzhiyun- clocks: phandles to input clocks. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional properties: 14*4882a593Smuzhiyun- clock-frequency: Desired I2C bus frequency in Hz, default value is 100000. 15*4882a593Smuzhiyun- Child nodes conforming to i2c bus binding. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExamples : 18*4882a593Smuzhiyun 19*4882a593Smuzhiyuni2c0: i2c@f8028000 { 20*4882a593Smuzhiyun compatible = "atmel,sama5d2-i2c"; 21*4882a593Smuzhiyun reg = <0xf8028000 0x100>; 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells = <0>; 24*4882a593Smuzhiyun clocks = <&twi0_clk>; 25*4882a593Smuzhiyun clock-frequency = <100000>; 26*4882a593Smuzhiyun}; 27