xref: /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpio/nvidia,tegra20-gpio.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunNVIDIA Tegra GPIO controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible : "nvidia,tegra<chip>-gpio"
5*4882a593Smuzhiyun- reg : Physical base address and length of the controller's registers.
6*4882a593Smuzhiyun- interrupts : The interrupt outputs from the controller. For Tegra20,
7*4882a593Smuzhiyun  there should be 7 interrupts specified, and for Tegra30, there should
8*4882a593Smuzhiyun  be 8 interrupts specified.
9*4882a593Smuzhiyun- #gpio-cells : Should be two. The first cell is the pin number and the
10*4882a593Smuzhiyun  second cell is used to specify optional parameters:
11*4882a593Smuzhiyun  - bit 0 specifies polarity (0 for normal, 1 for inverted)
12*4882a593Smuzhiyun- gpio-controller : Marks the device node as a GPIO controller.
13*4882a593Smuzhiyun- #interrupt-cells : Should be 2.
14*4882a593Smuzhiyun  The first cell is the GPIO number.
15*4882a593Smuzhiyun  The second cell is used to specify flags:
16*4882a593Smuzhiyun    bits[3:0] trigger type and level flags:
17*4882a593Smuzhiyun      1 = low-to-high edge triggered.
18*4882a593Smuzhiyun      2 = high-to-low edge triggered.
19*4882a593Smuzhiyun      4 = active high level-sensitive.
20*4882a593Smuzhiyun      8 = active low level-sensitive.
21*4882a593Smuzhiyun      Valid combinations are 1, 2, 3, 4, 8.
22*4882a593Smuzhiyun- interrupt-controller : Marks the device node as an interrupt controller.
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunExample:
25*4882a593Smuzhiyun
26*4882a593Smuzhiyungpio: gpio@6000d000 {
27*4882a593Smuzhiyun	compatible = "nvidia,tegra20-gpio";
28*4882a593Smuzhiyun	reg = < 0x6000d000 0x1000 >;
29*4882a593Smuzhiyun	interrupts = < 0 32 0x04
30*4882a593Smuzhiyun		       0 33 0x04
31*4882a593Smuzhiyun		       0 34 0x04
32*4882a593Smuzhiyun		       0 35 0x04
33*4882a593Smuzhiyun		       0 55 0x04
34*4882a593Smuzhiyun		       0 87 0x04
35*4882a593Smuzhiyun		       0 89 0x04 >;
36*4882a593Smuzhiyun	#gpio-cells = <2>;
37*4882a593Smuzhiyun	gpio-controller;
38*4882a593Smuzhiyun	#interrupt-cells = <2>;
39*4882a593Smuzhiyun	interrupt-controller;
40*4882a593Smuzhiyun};
41