1*4882a593SmuzhiyunNotes on the the generic USB-OHCI driver 2*4882a593Smuzhiyun======================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis driver (drivers/usb/usb_ohci.[ch]) is the result of the merge of 5*4882a593Smuzhiyunvarious existing OHCI drivers that were basically identical beside 6*4882a593Smuzhiyuncpu/board dependant initalization. This initalization has been moved 7*4882a593Smuzhiyuninto cpu/board directories and are called via the hooks below. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunConfiguration options 10*4882a593Smuzhiyun---------------------- 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun CONFIG_USB_OHCI_NEW: enable the new OHCI driver 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun - extern int usb_board_init(void); 17*4882a593Smuzhiyun - extern int usb_board_stop(void); 18*4882a593Smuzhiyun - extern int usb_cpu_init_fail(void); 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun - extern int usb_cpu_init(void); 23*4882a593Smuzhiyun - extern int usb_cpu_stop(void); 24*4882a593Smuzhiyun - extern int usb_cpu_init_fail(void); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI 27*4882a593Smuzhiyun registers 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the 32*4882a593Smuzhiyun root hub. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunEndianness issues 36*4882a593Smuzhiyun------------------ 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunThe USB bus operates in little endian, but unfortunately there are 39*4882a593SmuzhiyunOHCI controllers that operate in big endian such as ppc4xx. For these the 40*4882a593Smuzhiyunconfig option 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun CONFIG_SYS_OHCI_BE_CONTROLLER 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunneeds to be defined. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunPCI Controllers 48*4882a593Smuzhiyun---------------- 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunYou'll need to define 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun CONFIG_PCI_OHCI 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunIf you have several USB PCI controllers, define 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunIf undefined, the first instance found in PCI space will be used. 59*4882a593Smuzhiyun 60*4882a593SmuzhiyunPCI Controllers need to do byte swapping on register accesses, so they 61*4882a593Smuzhiyunshould to define: 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun CONFIG_SYS_OHCI_SWAP_REG_ACCESS 64