1*4882a593SmuzhiyunThe common CFI driver provides this weak default implementation for 2*4882a593Smuzhiyunflash_cmd_reset(): 3*4882a593Smuzhiyun 4*4882a593Smuzhiyunstatic void __flash_cmd_reset(flash_info_t *info) 5*4882a593Smuzhiyun{ 6*4882a593Smuzhiyun /* 7*4882a593Smuzhiyun * We do not yet know what kind of commandset to use, so we issue 8*4882a593Smuzhiyun * the reset command in both Intel and AMD variants, in the hope 9*4882a593Smuzhiyun * that AMD flash roms ignore the Intel command. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 12*4882a593Smuzhiyun udelay(1); 13*4882a593Smuzhiyun flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 14*4882a593Smuzhiyun} 15*4882a593Smuzhiyunvoid flash_cmd_reset(flash_info_t *info) 16*4882a593Smuzhiyun __attribute__((weak,alias("__flash_cmd_reset"))); 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunSome flash chips seem to have trouble with this reset sequence. 19*4882a593SmuzhiyunIn this case, board-specific code can override this weak default 20*4882a593Smuzhiyunversion with a board-specific function. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunAt the time of writing, there are two boards that define their own 23*4882a593Smuzhiyunroutine for this. 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunFirst, the digsy_mtc board equipped with the M29W128GH from Numonyx 26*4882a593Smuzhiyunneeds this version to function properly: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyunvoid flash_cmd_reset(flash_info_t *info) 29*4882a593Smuzhiyun{ 30*4882a593Smuzhiyun flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 31*4882a593Smuzhiyun} 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunIn addition, the t3corp board defines the routine thusly: 34*4882a593Smuzhiyun 35*4882a593Smuzhiyunvoid flash_cmd_reset(flash_info_t *info) 36*4882a593Smuzhiyun{ 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and 39*4882a593Smuzhiyun * needs the Spansion type reset commands. The other flash chip 40*4882a593Smuzhiyun * is located behind a FPGA (Xilinx DS617) and needs the Intel type 41*4882a593Smuzhiyun * reset command. 42*4882a593Smuzhiyun */ 43*4882a593Smuzhiyun if (info->start[0] == CONFIG_SYS_FLASH_BASE) 44*4882a593Smuzhiyun flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 45*4882a593Smuzhiyun else 46*4882a593Smuzhiyun flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 47*4882a593Smuzhiyun} 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunsee also: 50*4882a593Smuzhiyunhttp://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun 53*4882a593SmuzhiyunConfig Option 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun CONFIG_SYS_MAX_FLASH_SECT: Number of sectors available on Flash device 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun CONFIG_SYS_FLASH_CFI_WIDTH: Data-width of the flash device 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun CONFIG_CMD_FLASH: Enables Flash command library 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun CONFIG_FLASH_CFI_DRIVER: Enables CFI Flash driver 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun CONFIG_FLASH_CFI_MTD: Enables MTD frame work for NOR Flash devices 64