1*4882a593SmuzhiyunMIPS Boston Development Board 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun--------- 4*4882a593Smuzhiyun About 5*4882a593Smuzhiyun--------- 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThe MIPS Boston development board is built around an FPGA & 3 PCIe controllers, 8*4882a593Smuzhiyunone of which is connected to an Intel EG20T Platform Controller Hub which 9*4882a593Smuzhiyunprovides most connectivity to the board. It is used during the development & 10*4882a593Smuzhiyuntesting of both new CPUs and the software support for them. It is essentially 11*4882a593Smuzhiyunthe successor of the older MIPS Malta board. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun-------- 14*4882a593Smuzhiyun QEMU 15*4882a593Smuzhiyun-------- 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunU-Boot can be run on a currently out-of-tree branch of QEMU with support for 18*4882a593Smuzhiyunthe Boston board added. This QEMU code can currently be found in the "boston" 19*4882a593Smuzhiyunbranch of git://git.linux-mips.org/pub/scm/paul/qemu.git and used like so: 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun $ git clone git://git.linux-mips.org/pub/scm/paul/qemu.git -b boston 22*4882a593Smuzhiyun $ cd qemu 23*4882a593Smuzhiyun $ ./configure --target-list=mips64el-softmmu 24*4882a593Smuzhiyun $ make 25*4882a593Smuzhiyun $ ./mips64el-softmmu/qemu-system-mips64el -M boston -m 2G \ 26*4882a593Smuzhiyun -bios u-boot.bin -serial stdio 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunPlease note that QEMU will default to emulating the I6400 CPU which implements 29*4882a593Smuzhiyunthe MIPS64r6 ISA, and at the time of writing doesn't implement any earlier CPUs 30*4882a593Smuzhiyunwith support for the CPS features the Boston board relies upon. You will 31*4882a593Smuzhiyuntherefore need to configure U-Boot to build for MIPSr6 in order to obtain a 32*4882a593Smuzhiyunbinary that will work in QEMU. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun------------- 35*4882a593Smuzhiyun Toolchain 36*4882a593Smuzhiyun------------- 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunIf building for MIPSr6 then you will need a toolchain including GCC 5.x or 39*4882a593Smuzhiyunnewer, or the Codescape toolchain available for download from Imagination 40*4882a593SmuzhiyunTechnologies: 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun http://codescape-mips-sdk.imgtec.com/components/toolchain/2015.06-05/ 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunThe "IMG GNU Linux Toolchain" is capable of building for all current MIPS ISAs, 45*4882a593Smuzhiyunarchitecture revisions & both endiannesses. 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun-------- 48*4882a593Smuzhiyun TODO 49*4882a593Smuzhiyun-------- 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun - AHCI support 52*4882a593Smuzhiyun - CPU driver 53*4882a593Smuzhiyun - Exception handling (+UHI?) 54*4882a593Smuzhiyun - Flash support 55*4882a593Smuzhiyun - IOCU support 56*4882a593Smuzhiyun - L2 cache support 57*4882a593Smuzhiyun - More general LCD display driver 58*4882a593Smuzhiyun - Multi-arch-variant multi-endian fat binary 59