xref: /OK3568_Linux_fs/u-boot/doc/README.atmel_pmecc (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunHow to enable PMECC(Programmable Multibit ECC) for nand on Atmel SoCs
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3*4882a593Smuzhiyun2012-08-22 Josh Wu <josh.wu@atmel.com>
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5*4882a593SmuzhiyunThe Programmable Multibit ECC (PMECC) controller is a programmable binary
6*4882a593SmuzhiyunBCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
7*4882a593Smuzhiyuncan be used to support both SLC and MLC NAND Flash devices. It supports to
8*4882a593Smuzhiyungenerate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector (512 or
9*4882a593Smuzhiyun1024 bytes) of data.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunFollowing Atmel AT91 products support PMECC.
12*4882a593Smuzhiyun- AT91SAM9X25, X35, G25, G15, G35 (tested)
13*4882a593Smuzhiyun- AT91SAM9N12 (not tested, Should work)
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15*4882a593SmuzhiyunAs soon as your nand flash software ECC works, you can enable PMECC.
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17*4882a593SmuzhiyunTo use PMECC in this driver, the user needs to set:
18*4882a593Smuzhiyun	1. the PMECC correction error bits capability: CONFIG_PMECC_CAP.
19*4882a593Smuzhiyun	   It can be 2, 4, 8, 12 or 24.
20*4882a593Smuzhiyun	2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE.
21*4882a593Smuzhiyun	   It only can be 512 or 1024.
22*4882a593Smuzhiyun
23*4882a593SmuzhiyunTake 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board
24*4882a593Smuzhiyunconfiguration file has the following entries:
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26*4882a593Smuzhiyun	CONFIG_PMECC_CAP=2
27*4882a593Smuzhiyun	CONFIG_PMECC_SECTOR_SIZE=512
28*4882a593Smuzhiyun	CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
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30*4882a593SmuzhiyunHow to enable PMECC header for direct programmable boot.bin
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32*4882a593Smuzhiyun2014-05-19 Andreas Bießmann <andreas@biessmann.org>
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34*4882a593SmuzhiyunThe usual way to program SPL into NAND flash is to use the SAM-BA Atmel tool.
35*4882a593SmuzhiyunThis however is often not usable when doing field updates. To be able to
36*4882a593Smuzhiyunprogram a SPL binary into NAND flash we need to add the PMECC header to the
37*4882a593Smuzhiyunbinary before. Chapter '12.4.4.1 NAND Flash Boot: NAND Flash Detection' in
38*4882a593Smuzhiyunsama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to
39*4882a593Smuzhiyunlook like. In order to do so we have a new image type added to mkimage to
40*4882a593Smuzhiyungenerate this PMECC header and integrated this into the build process of SPL.
41*4882a593Smuzhiyun
42*4882a593SmuzhiyunTo enable the generation of atmel PMECC header for SPL one needs to define
43*4882a593SmuzhiyunCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from
44*4882a593Smuzhiyunboard configuration and compiled into the host tools atmel_pmecc_params. This
45*4882a593Smuzhiyuntool will be called in build process to parametrize mkimage for atmelimage
46*4882a593Smuzhiyuntype. The mkimage tool has intentionally _not_ compiled in those parameters.
47*4882a593Smuzhiyun
48*4882a593SmuzhiyunThe mkimage image type atmelimage also set the 6'th interrupt vector to the
49*4882a593Smuzhiyuncorrect value. This feature can also be used to setup a boot.bin for MMC boot.
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