1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <malloc.h>
10*4882a593Smuzhiyun #include <version.h>
11*4882a593Smuzhiyun #include <asm/sections.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <asm/u-boot.h>
14*4882a593Smuzhiyun #include <lzma/LzmaTools.h>
15*4882a593Smuzhiyun #include <asm/arch/rk_atags.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /********************** SPL framework weak ***********************/
board_init_f(ulong dummy)18*4882a593Smuzhiyun void board_init_f(ulong dummy)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun /* Mainly to init secure */
21*4882a593Smuzhiyun arch_cpu_init();
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
spl_relocate_stack_gd(void)24*4882a593Smuzhiyun ulong spl_relocate_stack_gd(void)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun return 0;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
board_fit_config_name_match(const char * name)29*4882a593Smuzhiyun int board_fit_config_name_match(const char *name)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun return 0;
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /********************** Decomp Header code ***********************/
35*4882a593Smuzhiyun #define UART_FIFO_EMPTY (BIT(6) | BIT(5))
36*4882a593Smuzhiyun #define UART_LSR 0x14
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun enum {
39*4882a593Smuzhiyun E_OK,
40*4882a593Smuzhiyun E_BD,
41*4882a593Smuzhiyun E_TLB,
42*4882a593Smuzhiyun E_MAGIC,
43*4882a593Smuzhiyun E_HCRC,
44*4882a593Smuzhiyun E_DCRC,
45*4882a593Smuzhiyun E_ALGO,
46*4882a593Smuzhiyun E_UNDEF,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun static const char *err_msg[] = {
50*4882a593Smuzhiyun "OK", "BD", "TLB", "MAGIC", "HCRC", "DCRC", "ALGO", "UNDEF"
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static ulong g_uart_base = CONFIG_DEBUG_UART_BASE;
54*4882a593Smuzhiyun
put_char(char ch)55*4882a593Smuzhiyun static void put_char(char ch)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun ulong base = g_uart_base;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (!g_uart_base)
60*4882a593Smuzhiyun return;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun writel(ch, base);
63*4882a593Smuzhiyun if (ch == '\n')
64*4882a593Smuzhiyun writel('\r', base);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun while (!(__arch_getl(base + UART_LSR) & UART_FIFO_EMPTY))
67*4882a593Smuzhiyun ;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
put_string(const char * str)70*4882a593Smuzhiyun static void put_string(const char *str)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun while (*str) {
73*4882a593Smuzhiyun put_char(*str);
74*4882a593Smuzhiyun str++;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
put_dec_0_19(int dec)78*4882a593Smuzhiyun static void put_dec_0_19(int dec)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun if (dec >= 10) {
81*4882a593Smuzhiyun put_char('1');
82*4882a593Smuzhiyun dec -= 10;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun put_char(dec + '0');
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
put_hex(u32 hex)88*4882a593Smuzhiyun static void put_hex(u32 hex)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun uint8_t c, i = 8;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun put_string("0x");
93*4882a593Smuzhiyun while (i--) {
94*4882a593Smuzhiyun c = (hex & 0xf0000000) >> 28;
95*4882a593Smuzhiyun put_char(c < 0xa ? c + '0' : c - 0xa + 'a');
96*4882a593Smuzhiyun hex <<= 4;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
jump_entry(void * addr)100*4882a593Smuzhiyun static void jump_entry(void *addr)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun void (*os_entry)(void) = (void *)addr;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun flush_dcache_all();
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * Turn off I-cache and invalidate it
108*4882a593Smuzhiyun */
109*4882a593Smuzhiyun icache_disable();
110*4882a593Smuzhiyun invalidate_icache_all();
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /*
113*4882a593Smuzhiyun * Turn off D-cache
114*4882a593Smuzhiyun * dcache_disable() in turn flushes the d-cache and disables MMU
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun dcache_disable();
117*4882a593Smuzhiyun invalidate_dcache_all();
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun dsb();
120*4882a593Smuzhiyun isb();
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun (*os_entry)();
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
uart_init(void)125*4882a593Smuzhiyun static struct tag *uart_init(void)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
128*4882a593Smuzhiyun defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
129*4882a593Smuzhiyun struct tag *t;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun t = atags_get_tag(ATAG_SERIAL);
132*4882a593Smuzhiyun if (t) {
133*4882a593Smuzhiyun if (t->u.serial.enable)
134*4882a593Smuzhiyun g_uart_base = t->u.serial.addr;
135*4882a593Smuzhiyun else
136*4882a593Smuzhiyun g_uart_base = 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun #endif
139*4882a593Smuzhiyun return t;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
print_ret(int err,int err_algo)142*4882a593Smuzhiyun static void print_ret(int err, int err_algo)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun if (err)
145*4882a593Smuzhiyun put_string("ERR ");
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun put_string(err_msg[err]);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun if (err_algo) {
150*4882a593Smuzhiyun put_char(' ');
151*4882a593Smuzhiyun put_dec_0_19(err_algo);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun put_char('\n');
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun #ifdef CONFIG_SPL_LZMA
un_lzma(const image_header_t * hdr,int * err_algo)157*4882a593Smuzhiyun static int un_lzma(const image_header_t *hdr, int *err_algo)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun const void *data;
160*4882a593Smuzhiyun ulong load_addr;
161*4882a593Smuzhiyun SizeT lzma_len;
162*4882a593Smuzhiyun SizeT src_lenp;
163*4882a593Smuzhiyun int err;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun load_addr = uimage_to_cpu(hdr->ih_load);
166*4882a593Smuzhiyun src_lenp = *(u32 *)(uimage_to_cpu(hdr->ih_size));
167*4882a593Smuzhiyun data = (void *)hdr + sizeof(*hdr);
168*4882a593Smuzhiyun lzma_len = SZ_2M; /* default max size */
169*4882a593Smuzhiyun err = lzmaBuffToBuffDecompress((uchar *)(load_addr), &lzma_len,
170*4882a593Smuzhiyun (uchar *)(data), src_lenp);
171*4882a593Smuzhiyun if (err) {
172*4882a593Smuzhiyun *err_algo = err;
173*4882a593Smuzhiyun err = E_ALGO;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return err;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun #endif
179*4882a593Smuzhiyun
decompress_image(const image_header_t * hdr,int * err_algo)180*4882a593Smuzhiyun static int decompress_image(const image_header_t *hdr, int *err_algo)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun #ifdef CONFIG_SPL_LZMA
183*4882a593Smuzhiyun return un_lzma(hdr, err_algo);
184*4882a593Smuzhiyun #endif
185*4882a593Smuzhiyun return E_UNDEF;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
board_init_r(gd_t * dummy1,ulong dummy2)188*4882a593Smuzhiyun void board_init_r(gd_t *dummy1, ulong dummy2)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun const image_header_t *hdr;
191*4882a593Smuzhiyun struct tag *t;
192*4882a593Smuzhiyun ulong addr;
193*4882a593Smuzhiyun int err_algo = 0;
194*4882a593Smuzhiyun int err = 0;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun t = uart_init();
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun put_string("\nDECOMP " PLAIN_VERSION " (" U_BOOT_DATE " - " \
199*4882a593Smuzhiyun U_BOOT_TIME ")\n\n");
200*4882a593Smuzhiyun if (t) {
201*4882a593Smuzhiyun put_string("PreSerial: ");
202*4882a593Smuzhiyun put_char('0' + t->u.serial.id);
203*4882a593Smuzhiyun put_char('\n');
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun put_string("Start... ");
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* init malloc */
208*4882a593Smuzhiyun gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);
209*4882a593Smuzhiyun gd->malloc_ptr = 0;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /* set up bank */
212*4882a593Smuzhiyun #ifndef CONFIG_ARM64
213*4882a593Smuzhiyun if (!gd->bd) {
214*4882a593Smuzhiyun gd->bd = calloc(1, sizeof(bd_t));
215*4882a593Smuzhiyun if (!gd->bd) {
216*4882a593Smuzhiyun err = E_BD;
217*4882a593Smuzhiyun goto out;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
220*4882a593Smuzhiyun gd->bd->bi_dram[0].size = SZ_64M; /* default */
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun #endif
223*4882a593Smuzhiyun /* TLB memory should be SZ_16K base align and 4KB end align */
224*4882a593Smuzhiyun gd->arch.tlb_size = PGTABLE_SIZE;
225*4882a593Smuzhiyun gd->arch.tlb_addr = (ulong)memalign(SZ_16K, ALIGN(PGTABLE_SIZE, SZ_4K));
226*4882a593Smuzhiyun if (!gd->arch.tlb_addr) {
227*4882a593Smuzhiyun err = E_TLB;
228*4882a593Smuzhiyun goto out;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* Enable dcache */
232*4882a593Smuzhiyun dcache_enable();
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* Check */
235*4882a593Smuzhiyun hdr = (void *)(&__bss_end);
236*4882a593Smuzhiyun if (!image_check_magic(hdr)) {
237*4882a593Smuzhiyun err = E_MAGIC;
238*4882a593Smuzhiyun goto out;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun if (!image_check_hcrc(hdr)) {
242*4882a593Smuzhiyun err = E_HCRC;
243*4882a593Smuzhiyun goto out;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun if (!image_check_dcrc(hdr)) {
247*4882a593Smuzhiyun err = E_DCRC;
248*4882a593Smuzhiyun goto out;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /* Decompress... */
252*4882a593Smuzhiyun err = decompress_image(hdr, &err_algo);
253*4882a593Smuzhiyun out:
254*4882a593Smuzhiyun print_ret(err, err_algo);
255*4882a593Smuzhiyun if (!err) {
256*4882a593Smuzhiyun addr = uimage_to_cpu(hdr->ih_load);
257*4882a593Smuzhiyun put_string("Jumping to ");
258*4882a593Smuzhiyun put_hex((u32)addr);
259*4882a593Smuzhiyun put_char('\n');
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* jump! */
262*4882a593Smuzhiyun jump_entry((void *)addr);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /* hang */
266*4882a593Smuzhiyun put_string("\nPanic hang!");
267*4882a593Smuzhiyun while (1)
268*4882a593Smuzhiyun ;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271