1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <command.h>
9*4882a593Smuzhiyun #include <malloc.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <pci.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <universe.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define PCI_VENDOR PCI_VENDOR_ID_TUNDRA
16*4882a593Smuzhiyun #define PCI_DEVICE PCI_DEVICE_ID_TUNDRA_CA91C042
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun typedef struct _UNI_DEV UNI_DEV;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct _UNI_DEV {
22*4882a593Smuzhiyun int bus;
23*4882a593Smuzhiyun pci_dev_t busdevfn;
24*4882a593Smuzhiyun UNIVERSE *uregs;
25*4882a593Smuzhiyun unsigned int pci_bs;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static UNI_DEV *dev;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun
universe_init(void)31*4882a593Smuzhiyun int universe_init(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun int j, result;
34*4882a593Smuzhiyun pci_dev_t busdevfn;
35*4882a593Smuzhiyun unsigned int val;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun busdevfn = pci_find_device(PCI_VENDOR, PCI_DEVICE, 0);
38*4882a593Smuzhiyun if (busdevfn == -1) {
39*4882a593Smuzhiyun puts("No Tundra Universe found!\n");
40*4882a593Smuzhiyun return -1;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Lets turn Latency off */
44*4882a593Smuzhiyun pci_write_config_dword(busdevfn, 0x0c, 0);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun dev = malloc(sizeof(*dev));
47*4882a593Smuzhiyun if (NULL == dev) {
48*4882a593Smuzhiyun puts("UNIVERSE: No memory!\n");
49*4882a593Smuzhiyun result = -1;
50*4882a593Smuzhiyun goto break_20;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun memset(dev, 0, sizeof(*dev));
54*4882a593Smuzhiyun dev->busdevfn = busdevfn;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_1, &val);
57*4882a593Smuzhiyun if (val & 1) {
58*4882a593Smuzhiyun pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_0, &val);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun val &= ~0xf;
61*4882a593Smuzhiyun dev->uregs = (UNIVERSE *)val;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun debug ("UNIVERSE-Base : %p\n", dev->uregs);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* check mapping */
66*4882a593Smuzhiyun debug (" Read via mapping, PCI_ID = %08X\n", readl(&dev->uregs->pci_id));
67*4882a593Smuzhiyun if (((PCI_DEVICE <<16) | PCI_VENDOR) != readl(&dev->uregs->pci_id)) {
68*4882a593Smuzhiyun printf ("UNIVERSE: Cannot read PCI-ID via Mapping: %08x\n",
69*4882a593Smuzhiyun readl(&dev->uregs->pci_id));
70*4882a593Smuzhiyun result = -1;
71*4882a593Smuzhiyun goto break_30;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun debug ("PCI_BS = %08X\n", readl(&dev->uregs->pci_bs));
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun dev->pci_bs = readl(&dev->uregs->pci_bs);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* turn off windows */
79*4882a593Smuzhiyun for (j=0; j <4; j ++) {
80*4882a593Smuzhiyun writel(0x00800000, &dev->uregs->lsi[j].ctl);
81*4882a593Smuzhiyun writel(0x00800000, &dev->uregs->vsi[j].ctl);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun * Write to Misc Register
86*4882a593Smuzhiyun * Set VME Bus Time-out
87*4882a593Smuzhiyun * Arbitration Mode
88*4882a593Smuzhiyun * DTACK Enable
89*4882a593Smuzhiyun */
90*4882a593Smuzhiyun writel(0x15040000 | (readl(&dev->uregs->misc_ctl) & 0x00020000), &dev->uregs->misc_ctl);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (readl(&dev->uregs->misc_ctl) & 0x00020000) {
93*4882a593Smuzhiyun debug ("System Controller!\n"); /* test-only */
94*4882a593Smuzhiyun } else {
95*4882a593Smuzhiyun debug ("Not System Controller!\n"); /* test-only */
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /*
99*4882a593Smuzhiyun * Lets turn off interrupts
100*4882a593Smuzhiyun */
101*4882a593Smuzhiyun writel(0x00000000,&dev->uregs->lint_en); /* Disable interrupts in the Universe first */
102*4882a593Smuzhiyun writel(0x0000FFFF,&dev->uregs->lint_stat); /* Clear Any Pending Interrupts */
103*4882a593Smuzhiyun eieio();
104*4882a593Smuzhiyun writel(0x0000, &dev->uregs->lint_map0); /* Map all ints to 0 */
105*4882a593Smuzhiyun writel(0x0000, &dev->uregs->lint_map1); /* Map all ints to 0 */
106*4882a593Smuzhiyun eieio();
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun break_30:
111*4882a593Smuzhiyun free(dev);
112*4882a593Smuzhiyun break_20:
113*4882a593Smuzhiyun return result;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun * Create pci slave window (access: pci -> vme)
119*4882a593Smuzhiyun */
universe_pci_slave_window(unsigned int pciAddr,unsigned int vmeAddr,int size,int vam,int pms,int vdw)120*4882a593Smuzhiyun int universe_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, int size, int vam, int pms, int vdw)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun int result, i;
123*4882a593Smuzhiyun unsigned int ctl = 0;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (NULL == dev) {
126*4882a593Smuzhiyun result = -1;
127*4882a593Smuzhiyun goto exit_10;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
131*4882a593Smuzhiyun if (0x00800000 == readl(&dev->uregs->lsi[i].ctl))
132*4882a593Smuzhiyun break;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (i == 4) {
136*4882a593Smuzhiyun printf ("universe: No Image available\n");
137*4882a593Smuzhiyun result = -1;
138*4882a593Smuzhiyun goto exit_10;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun debug ("universe: Using image %d\n", i);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun writel(pciAddr , &dev->uregs->lsi[i].bs);
144*4882a593Smuzhiyun writel((pciAddr + size), &dev->uregs->lsi[i].bd);
145*4882a593Smuzhiyun writel((vmeAddr - pciAddr), &dev->uregs->lsi[i].to);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun switch (vam & VME_AM_Axx) {
148*4882a593Smuzhiyun case VME_AM_A16:
149*4882a593Smuzhiyun ctl = 0x00000000;
150*4882a593Smuzhiyun break;
151*4882a593Smuzhiyun case VME_AM_A24:
152*4882a593Smuzhiyun ctl = 0x00010000;
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun case VME_AM_A32:
155*4882a593Smuzhiyun ctl = 0x00020000;
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun switch (vam & VME_AM_Mxx) {
160*4882a593Smuzhiyun case VME_AM_DATA:
161*4882a593Smuzhiyun ctl |= 0x00000000;
162*4882a593Smuzhiyun break;
163*4882a593Smuzhiyun case VME_AM_PROG:
164*4882a593Smuzhiyun ctl |= 0x00008000;
165*4882a593Smuzhiyun break;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (vam & VME_AM_SUP) {
169*4882a593Smuzhiyun ctl |= 0x00001000;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun switch (vdw & VME_FLAG_Dxx) {
174*4882a593Smuzhiyun case VME_FLAG_D8:
175*4882a593Smuzhiyun ctl |= 0x00000000;
176*4882a593Smuzhiyun break;
177*4882a593Smuzhiyun case VME_FLAG_D16:
178*4882a593Smuzhiyun ctl |= 0x00400000;
179*4882a593Smuzhiyun break;
180*4882a593Smuzhiyun case VME_FLAG_D32:
181*4882a593Smuzhiyun ctl |= 0x00800000;
182*4882a593Smuzhiyun break;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun switch (pms & PCI_MS_Mxx) {
186*4882a593Smuzhiyun case PCI_MS_MEM:
187*4882a593Smuzhiyun ctl |= 0x00000000;
188*4882a593Smuzhiyun break;
189*4882a593Smuzhiyun case PCI_MS_IO:
190*4882a593Smuzhiyun ctl |= 0x00000001;
191*4882a593Smuzhiyun break;
192*4882a593Smuzhiyun case PCI_MS_CONFIG:
193*4882a593Smuzhiyun ctl |= 0x00000002;
194*4882a593Smuzhiyun break;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun ctl |= 0x80000000; /* enable */
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun writel(ctl, &dev->uregs->lsi[i].ctl);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun debug ("universe: window-addr=%p\n", &dev->uregs->lsi[i].ctl);
202*4882a593Smuzhiyun debug ("universe: pci slave window[%d] ctl=%08x\n", i, readl(&dev->uregs->lsi[i].ctl));
203*4882a593Smuzhiyun debug ("universe: pci slave window[%d] bs=%08x\n", i, readl(&dev->uregs->lsi[i].bs));
204*4882a593Smuzhiyun debug ("universe: pci slave window[%d] bd=%08x\n", i, readl(&dev->uregs->lsi[i].bd));
205*4882a593Smuzhiyun debug ("universe: pci slave window[%d] to=%08x\n", i, readl(&dev->uregs->lsi[i].to));
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun return 0;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun exit_10:
210*4882a593Smuzhiyun return -result;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /*
215*4882a593Smuzhiyun * Create vme slave window (access: vme -> pci)
216*4882a593Smuzhiyun */
universe_vme_slave_window(unsigned int vmeAddr,unsigned int pciAddr,int size,int vam,int pms)217*4882a593Smuzhiyun int universe_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int size, int vam, int pms)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun int result, i;
220*4882a593Smuzhiyun unsigned int ctl = 0;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun if (NULL == dev) {
223*4882a593Smuzhiyun result = -1;
224*4882a593Smuzhiyun goto exit_10;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
228*4882a593Smuzhiyun if (0x00800000 == readl(&dev->uregs->vsi[i].ctl))
229*4882a593Smuzhiyun break;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (i == 4) {
233*4882a593Smuzhiyun printf ("universe: No Image available\n");
234*4882a593Smuzhiyun result = -1;
235*4882a593Smuzhiyun goto exit_10;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun debug ("universe: Using image %d\n", i);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun writel(vmeAddr , &dev->uregs->vsi[i].bs);
241*4882a593Smuzhiyun writel((vmeAddr + size), &dev->uregs->vsi[i].bd);
242*4882a593Smuzhiyun writel((pciAddr - vmeAddr), &dev->uregs->vsi[i].to);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun switch (vam & VME_AM_Axx) {
245*4882a593Smuzhiyun case VME_AM_A16:
246*4882a593Smuzhiyun ctl = 0x00000000;
247*4882a593Smuzhiyun break;
248*4882a593Smuzhiyun case VME_AM_A24:
249*4882a593Smuzhiyun ctl = 0x00010000;
250*4882a593Smuzhiyun break;
251*4882a593Smuzhiyun case VME_AM_A32:
252*4882a593Smuzhiyun ctl = 0x00020000;
253*4882a593Smuzhiyun break;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun switch (vam & VME_AM_Mxx) {
257*4882a593Smuzhiyun case VME_AM_DATA:
258*4882a593Smuzhiyun ctl |= 0x00000000;
259*4882a593Smuzhiyun break;
260*4882a593Smuzhiyun case VME_AM_PROG:
261*4882a593Smuzhiyun ctl |= 0x00800000;
262*4882a593Smuzhiyun break;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun if (vam & VME_AM_SUP) {
266*4882a593Smuzhiyun ctl |= 0x00100000;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun switch (pms & PCI_MS_Mxx) {
271*4882a593Smuzhiyun case PCI_MS_MEM:
272*4882a593Smuzhiyun ctl |= 0x00000000;
273*4882a593Smuzhiyun break;
274*4882a593Smuzhiyun case PCI_MS_IO:
275*4882a593Smuzhiyun ctl |= 0x00000001;
276*4882a593Smuzhiyun break;
277*4882a593Smuzhiyun case PCI_MS_CONFIG:
278*4882a593Smuzhiyun ctl |= 0x00000002;
279*4882a593Smuzhiyun break;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun ctl |= 0x80f00000; /* enable */
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun writel(ctl, &dev->uregs->vsi[i].ctl);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun debug ("universe: window-addr=%p\n", &dev->uregs->vsi[i].ctl);
287*4882a593Smuzhiyun debug ("universe: vme slave window[%d] ctl=%08x\n", i, readl(&dev->uregs->vsi[i].ctl));
288*4882a593Smuzhiyun debug ("universe: vme slave window[%d] bs=%08x\n", i, readl(&dev->uregs->vsi[i].bs));
289*4882a593Smuzhiyun debug ("universe: vme slave window[%d] bd=%08x\n", i, readl(&dev->uregs->vsi[i].bd));
290*4882a593Smuzhiyun debug ("universe: vme slave window[%d] to=%08x\n", i, readl(&dev->uregs->vsi[i].to));
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun exit_10:
295*4882a593Smuzhiyun return -result;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /*
300*4882a593Smuzhiyun * Tundra Universe configuration
301*4882a593Smuzhiyun */
do_universe(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])302*4882a593Smuzhiyun int do_universe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, pms = 0, vdw = 0;
305*4882a593Smuzhiyun char cmd = 'x';
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* get parameter */
308*4882a593Smuzhiyun if (argc > 1)
309*4882a593Smuzhiyun cmd = argv[1][0];
310*4882a593Smuzhiyun if (argc > 2)
311*4882a593Smuzhiyun addr1 = simple_strtoul(argv[2], NULL, 16);
312*4882a593Smuzhiyun if (argc > 3)
313*4882a593Smuzhiyun addr2 = simple_strtoul(argv[3], NULL, 16);
314*4882a593Smuzhiyun if (argc > 4)
315*4882a593Smuzhiyun size = simple_strtoul(argv[4], NULL, 16);
316*4882a593Smuzhiyun if (argc > 5)
317*4882a593Smuzhiyun vam = simple_strtoul(argv[5], NULL, 16);
318*4882a593Smuzhiyun if (argc > 6)
319*4882a593Smuzhiyun pms = simple_strtoul(argv[6], NULL, 16);
320*4882a593Smuzhiyun if (argc > 7)
321*4882a593Smuzhiyun vdw = simple_strtoul(argv[7], NULL, 16);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun switch (cmd) {
324*4882a593Smuzhiyun case 'i': /* init */
325*4882a593Smuzhiyun universe_init();
326*4882a593Smuzhiyun break;
327*4882a593Smuzhiyun case 'v': /* vme */
328*4882a593Smuzhiyun printf("Configuring Universe VME Slave Window (VME->PCI):\n");
329*4882a593Smuzhiyun printf(" vme=%08lx pci=%08lx size=%08lx vam=%02lx pms=%02lx\n",
330*4882a593Smuzhiyun addr1, addr2, size, vam, pms);
331*4882a593Smuzhiyun universe_vme_slave_window(addr1, addr2, size, vam, pms);
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun case 'p': /* pci */
334*4882a593Smuzhiyun printf("Configuring Universe PCI Slave Window (PCI->VME):\n");
335*4882a593Smuzhiyun printf(" pci=%08lx vme=%08lx size=%08lx vam=%02lx pms=%02lx vdw=%02lx\n",
336*4882a593Smuzhiyun addr1, addr2, size, vam, pms, vdw);
337*4882a593Smuzhiyun universe_pci_slave_window(addr1, addr2, size, vam, pms, vdw);
338*4882a593Smuzhiyun break;
339*4882a593Smuzhiyun default:
340*4882a593Smuzhiyun printf("Universe command %s not supported!\n", argv[1]);
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun U_BOOT_CMD(
348*4882a593Smuzhiyun universe, 8, 1, do_universe,
349*4882a593Smuzhiyun "initialize and configure Turndra Universe",
350*4882a593Smuzhiyun "init\n"
351*4882a593Smuzhiyun " - initialize universe\n"
352*4882a593Smuzhiyun "universe vme [vme_addr] [pci_addr] [size] [vam] [pms]\n"
353*4882a593Smuzhiyun " - create vme slave window (access: vme->pci)\n"
354*4882a593Smuzhiyun "universe pci [pci_addr] [vme_addr] [size] [vam] [pms] [vdw]\n"
355*4882a593Smuzhiyun " - create pci slave window (access: pci->vme)\n"
356*4882a593Smuzhiyun " [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n"
357*4882a593Smuzhiyun " 02 -> A24 Address Space\n"
358*4882a593Smuzhiyun " 03 -> A32 Address Space\n"
359*4882a593Smuzhiyun " 04 -> Supervisor AM Code\n"
360*4882a593Smuzhiyun " 10 -> Data AM Code\n"
361*4882a593Smuzhiyun " 20 -> Program AM Code\n"
362*4882a593Smuzhiyun " [pms] = PCI Memory Space: 01 -> Memory Space\n"
363*4882a593Smuzhiyun " 02 -> I/O Space\n"
364*4882a593Smuzhiyun " 03 -> Configuration Space\n"
365*4882a593Smuzhiyun " [vdw] = VMEbus Maximum Datawidth: 01 -> D8 Data Width\n"
366*4882a593Smuzhiyun " 02 -> D16 Data Width\n"
367*4882a593Smuzhiyun " 03 -> D32 Data Width"
368*4882a593Smuzhiyun );
369